The following aarch64 SVE2 splice instructions do not assemble correctly. I assembled these instructions using -march=armv8-a+sve2 with aarch64-linux-gnu-gcc.
I tried disassembling these with cstool built from the commit on the next branch (f36795e).
A constructive splice does not disassemble at all.
splice z29.b, p7, { z30.b, z31.b }
cstool -d arm64 'dd 9f 2d 05'
ERROR: invalid assembly code
A destructive splice is missing op.vas specifiers on all of the vector register operands.
splice z29.b, p7, z29.b, z31.b
cstool -d arm64 'fd 9f 2c 05'
0 fd 9f 2c 05 splice z29.b, p7, z29.b, z31.b
ID: 651 (splice)
op_count: 4
operands[0].type: REG = z29
operands[1].type: REG = p7
operands[2].type: REG = z29
operands[3].type: REG = z31
Compare to the dup instruction, which has op.vas set:
cstool -d arm64 'e8 0e 04 0e'
0 e8 0e 04 0e dup v8.2s, w23
ID: 157 (dup)
op_count: 2
operands[0].type: REG = v8
operands[0].access: WRITE
Vector Arrangement Specifier: 0xa
operands[1].type: REG = w23
operands[1].access: READ
Registers read: w23
Registers modified: v8
Groups: neon
The following aarch64 SVE2 splice instructions do not assemble correctly. I assembled these instructions using
-march=armv8-a+sve2withaarch64-linux-gnu-gcc.I tried disassembling these with
cstoolbuilt from the commit on thenextbranch (f36795e).A constructive splice does not disassemble at all.
A destructive splice is missing
op.vasspecifiers on all of the vector register operands.Compare to the
dupinstruction, which hasop.vasset: