Arm, some main_v8 MVE instructions not disassembled

[MostBaffled]

Instructions like

vldrw.u32       q1, [r1]

comes out as and ldc instruction. The decoding doesn't seem to recognise the fields that distinguish them.

[MostBaffled]

The llvm TableGen files seem to be much more extensive now in detailing the MVE instructions. I believe from reading other bits that they probably need processing to update the Capstone "inc" files. But it doesn't look an obvious process and I can't find any details on how to.