python bindings issue on reg value for ARM64

[wideglide]

It seems like commits 74be6d0 - f5a633d broke the python bindings in some way, but only for ARM64.

Although the disassembly text is correct the op.reg value is 0?

This is the output from bindings/python/test_arm64.py

Disasm:
0x2c:   mrs     x9, midr_el1
        op_count: 2
                operands[0].type: REG = None
                        Vector Index: 3
        Registers read: x9
        Registers modified: x9

The correct output is:

Disasm:
0x2c:   mrs     x9, midr_el1
        op_count: 2
                operands[0].type: REG = x9
                operands[0].access: READ | WRITE

                operands[1].type: SYS = 0xc000
                operands[1].access: READ | WRITE

        Registers read: x9
        Registers modified: x9

[FinnWilkinson]

Sorry, this seems to have been overlooked in my update to Armv9.2 in #1907 ! I’ll look into adding the new bindings asap

[wideglide]

awesome, thanks for the fix!