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Automate architecture synchronization with latest LLVM #1803
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5cf4820
LLVM autosync - Mips & ARM
Phosphorus15 4bda6c4
AArch64 auto-sync Integration
Phosphorus15 335d7af
Integrated rest of the supported archs into auto-sync
Phosphorus15 e5b0b74
Debug trace/logging system + Sparc integration fix
Phosphorus15 97ffaa0
Finish integration on all archs
Phosphorus15 79ae8b4
Utils & Sync compatibility improvement
Phosphorus15 8f12c6f
Synchronize with LLVM upstream changes on ARM & ARM64
Phosphorus15 b067e8c
Integrity check, bug fixes
Phosphorus15 e3458ff
Make sure tests pass - fixes on naming
Phosphorus15 f3f8238
Capstone RegisterClass array length fix + Code file reformats
Phosphorus15 391334d
Update generated table for bc0f-bc3f, w.r.t. d594f4f6b0755ab11580e1e8…
Phosphorus15 2db2477
Fix Makefile Linkage problem
Phosphorus15 66a0265
Consolidate disassembler & name mapping
Phosphorus15 23b2740
Cleanups on mappings & possible inconsistence
Phosphorus15 7614e7e
Add generated file headers, closes #9
Phosphorus15 09ac2e1
Added syncing file document, correct ARM64 instruction mapping, regar…
Phosphorus15 c0e35c2
Minor syncing README updates
XVilka 1d5b117
Merge pull request #13 from Phosphorus15/XVilka-patch-1
Phosphorus15 1bca421
Add guarded end instruction mapping
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| Original file line number | Diff line number | Diff line change |
|---|---|---|
| @@ -1,6 +1 @@ | ||
| BraceWrapping: | ||
| AfterClass: true | ||
| AfterControlStatement: false | ||
| AfterFunction: true | ||
| BreakBeforeBraces: Custom | ||
| UseTab: Always | ||
| BasedOnStyle: LLVM |
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| Original file line number | Diff line number | Diff line change |
|---|---|---|
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@@ -129,3 +129,6 @@ cstool/cstool | |
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| # android | ||
| android-ndk-* | ||
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| # cmake | ||
| cmake-build-debug | ||
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| Original file line number | Diff line number | Diff line change |
|---|---|---|
| @@ -0,0 +1,115 @@ | ||
| // | ||
| // Created by Phosphorus15 on 2021/5/14. | ||
| // | ||
| #include "MCInstPrinter.h" | ||
| #include "MCInst.h" | ||
| #include "sync/logger.h" | ||
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| static bool MCInstPrinter_matchAliasCondition( | ||
| const MCInst *MI, unsigned *OpIdx, const PatternsForOpcode *OpToPatterns, | ||
| const AliasPattern *Patterns, const AliasPatternCond *Conds, | ||
| const AliasPatternCond *Cond, bool *OrPredicateResult) { | ||
| // FIXME so here's on problem we ought to detect feature bits here | ||
| if (Cond->Kind == AliasPatternCond_K_Feature || | ||
| Cond->Kind == AliasPatternCond_K_NegFeature) | ||
| return true; // STI->getFeatureBits().test(C.Value); | ||
| // For feature tests where just one feature is required in a list, set the | ||
| // predicate result bit to whether the expression will return true, and only | ||
| // return the real result at the end of list marker. | ||
| if (Cond->Kind == AliasPatternCond_K_OrFeature) { | ||
| // *OrPredicateResult |= STI->getFeatureBits().test(C.Value); | ||
| return true; | ||
| } | ||
| if (Cond->Kind == AliasPatternCond_K_OrNegFeature) { | ||
| // *OrPredicateResult |= !(STI->getFeatureBits().test(C.Value)); | ||
| return true; | ||
| } | ||
| if (Cond->Kind == AliasPatternCond_K_EndOrFeatures) { | ||
| bool Res = *OrPredicateResult; | ||
| *OrPredicateResult = false; | ||
| return Res; | ||
| } | ||
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| const MCOperand *Opnd = MCInst_getOperand(MI, *OpIdx); | ||
| *OpIdx = *OpIdx + 1; | ||
| switch (Cond->Kind) { | ||
| case AliasPatternCond_K_Imm: | ||
| // Operand must be a specific immediate. | ||
| return MCOperand_isImm(Opnd) && MCOperand_getImm(Opnd) == Cond->Value; | ||
| case AliasPatternCond_K_Reg: | ||
| // Operand must be a specific register. | ||
| return MCOperand_isReg(Opnd) && MCOperand_getReg(Opnd) == Cond->Value; | ||
| case AliasPatternCond_K_TiedReg: | ||
| // Operand must match the register of another operand. | ||
| return MCOperand_isReg(Opnd) && | ||
| MCOperand_getReg(Opnd) == | ||
| MCOperand_getReg(MCInst_getOperand(MI, Cond->Value)); | ||
| case AliasPatternCond_K_RegClass: | ||
| // Operand must be a register in this class. Value is a register class id. | ||
| return MCOperand_isReg(Opnd) && | ||
| MCRegisterClass_contains( | ||
| MCRegisterInfo_getRegClass(MRI, Cond->Value), | ||
| MCOperand_getReg(Opnd)); | ||
| case AliasPatternCond_K_Custom: | ||
| // Operand must match some custom criteria. | ||
| // TODO might affect something return M.ValidateMCOperand(Opnd, | ||
| // *STI, C.Value); | ||
| return false; | ||
| case AliasPatternCond_K_Ignore: | ||
| // Operand can be anything. | ||
| return true; | ||
| case AliasPatternCond_K_Feature: | ||
| case AliasPatternCond_K_NegFeature: | ||
| case AliasPatternCond_K_OrFeature: | ||
| case AliasPatternCond_K_OrNegFeature: | ||
| case AliasPatternCond_K_EndOrFeatures: | ||
| 0x0; | ||
| // llvm_unreachable("handled earlier"); | ||
| } | ||
| } | ||
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| const char *MCInstPrinter_matchAliasPatterns( | ||
| const MCInst *MI, const PatternsForOpcode *OpToPatterns, | ||
| const AliasPattern *Patterns, const AliasPatternCond *Conds, | ||
| const char *AsmStrings[], unsigned len) { | ||
| // Binary search by opcode. Return false if there are no aliases for this | ||
| // opcode. | ||
| PatternsForOpcode *It = | ||
| Binary_Search(OpToPatterns, MCInst_getOpcode(MI), len); | ||
| debugln("binary search result %p, with opcode %d", It, MCInst_getOpcode(MI)); | ||
| if (It == NULL || It->Opcode != MCInst_getOpcode(MI)) | ||
| return NULL; | ||
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| // Try all patterns for this opcode. | ||
| uint32_t AsmStrOffset = ~0U; | ||
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| for (unsigned i = It->PatternStart; i < It->PatternStart + It->NumPatterns; | ||
| i++) { | ||
| const AliasPattern Pattern = Patterns[i]; | ||
| if (MCInst_getNumOperands(MI) != Pattern.NumOperands) | ||
| return NULL; | ||
| unsigned OpIdx = 0; | ||
| bool OrPredicateResult = false; | ||
| bool fallThrough = true; | ||
| for (unsigned j = Pattern.AliasCondStart; | ||
| j < Pattern.AliasCondStart + Pattern.NumConds; j++) { | ||
| fallThrough &= MCInstPrinter_matchAliasCondition( | ||
| MI, &OpIdx, OpToPatterns, Patterns, Conds, &Conds[j], | ||
| &OrPredicateResult); | ||
| if (!fallThrough) | ||
| break; | ||
| } | ||
| if (fallThrough) { | ||
| AsmStrOffset = Pattern.AsmStrOffset; | ||
| break; | ||
| } | ||
| } | ||
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| debugln("end matching with offset %d", AsmStrOffset); | ||
| // If no alias matched, don't print an alias. | ||
| if (AsmStrOffset == ~0U) | ||
| return NULL; | ||
| debugln("string with final offset %s", | ||
| (const char *)((*AsmStrings) + AsmStrOffset)); | ||
| return (const char *)((*AsmStrings) + AsmStrOffset); | ||
| } |
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| Original file line number | Diff line number | Diff line change |
|---|---|---|
| @@ -0,0 +1,73 @@ | ||
| // | ||
| // Created by Phosphorus15 on 2021/5/14. | ||
| // | ||
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| #ifndef CAPSTONE_MCINSTPRINTER_H | ||
| #define CAPSTONE_MCINSTPRINTER_H | ||
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| #include "MCInst.h" | ||
| #include "capstone/platform.h" | ||
| #include "stdlib.h" | ||
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| // TODO we'll need this later | ||
| const MCRegisterInfo *MRI; | ||
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| typedef enum CondKind { | ||
| AliasPatternCond_K_Feature, // Match only if a feature is enabled. | ||
| AliasPatternCond_K_NegFeature, // Match only if a feature is disabled. | ||
| AliasPatternCond_K_OrFeature, // Match only if one of a set of features is | ||
| // enabled. | ||
| AliasPatternCond_K_OrNegFeature, // Match only if one of a set of features is | ||
| // disabled. | ||
| AliasPatternCond_K_EndOrFeatures, // Note end of list of K_Or(Neg)?Features. | ||
| AliasPatternCond_K_Ignore, // Match any operand. | ||
| AliasPatternCond_K_Reg, // Match a specific register. | ||
| AliasPatternCond_K_TiedReg, // Match another already matched register. | ||
| AliasPatternCond_K_Imm, // Match a specific immediate. | ||
| AliasPatternCond_K_RegClass, // Match registers in a class. | ||
| AliasPatternCond_K_Custom, // Call custom matcher by index. | ||
| } CondKind; | ||
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| typedef struct PatternsForOpcode { | ||
| uint32_t Opcode; | ||
| uint16_t PatternStart; | ||
| uint16_t NumPatterns; | ||
| } PatternsForOpcode; | ||
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| typedef struct AliasPattern { | ||
| uint32_t AsmStrOffset; | ||
| uint32_t AliasCondStart; | ||
| uint8_t NumOperands; | ||
| uint8_t NumConds; | ||
| } AliasPattern; | ||
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| typedef struct AliasPatternCond { | ||
| CondKind Kind; | ||
| uint32_t Value; | ||
| } AliasPatternCond; | ||
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| static int cmp_less(const void *l, const void *r) { | ||
| return ((signed)((const PatternsForOpcode *)l)->Opcode) - | ||
| ((signed)((const PatternsForOpcode *)r)->Opcode); | ||
| } | ||
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| // Binary Search Implementation - let's use bsearch for now | ||
| static PatternsForOpcode *Binary_Search(const PatternsForOpcode *OpToPatterns, | ||
| const unsigned opcode, unsigned len) { | ||
| return bsearch((void *)&opcode, (void *)OpToPatterns, len, | ||
| sizeof(PatternsForOpcode), cmp_less); | ||
| } | ||
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| // TODO I'm not sure if this is complete, refer to lib/MC/MCInstPrinter.cpp in | ||
| // llvm-project | ||
| static bool MCInstPrinter_matchAliasCondition( | ||
| const MCInst *MI, unsigned *OpIdx, const PatternsForOpcode *OpToPatterns, | ||
| const AliasPattern *Patterns, const AliasPatternCond *Conds, | ||
| const AliasPatternCond *Cond, bool *OrPredicateResult); | ||
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| const char *MCInstPrinter_matchAliasPatterns( | ||
| const MCInst *MI, const PatternsForOpcode *OpToPatterns, | ||
| const AliasPattern *Patterns, const AliasPatternCond *Conds, | ||
| const char *AsmStrings[], unsigned len); | ||
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| #endif // CAPSTONE_MCINSTPRINTER_H |
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This was done like this on purpose to support
FetchContentworkflows without doing custom hackery on the cache. Likely a good solution is to set it toCAPSTONE_ROOT_PROJECT(and also set the other sensible defaults):There was a problem hiding this comment.
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Regardless, the change seems unrelated to the goal of this pr, so it should not be part of it.