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2 changes: 1 addition & 1 deletion bindings/python/capstone/__init__.py
Original file line number Diff line number Diff line change
Expand Up @@ -703,7 +703,7 @@ def __gen_detail(self):
(self.prefix, self.opcode, self.rex, self.addr_size, \
self.modrm, self.sib, self.disp, \
self.sib_index, self.sib_scale, self.sib_base, self.xop_cc, self.sse_cc, \
self.avx_cc, self.avx_sae, self.avx_rm, self.eflags, \
self.avx_cc, self.avx_sae, self.avx_rm, self.eflags, self.fpu_flags, \
self.encoding, self.modrm_offset, self.disp_offset, self.disp_size, self.imm_offset, self.imm_size, \
self.operands) = x86.get_arch_info(self._raw.detail.contents.arch.x86)
elif arch == CS_ARCH_M68K:
Expand Down
4 changes: 4 additions & 0 deletions bindings/python/capstone/m68k.py
Original file line number Diff line number Diff line change
Expand Up @@ -66,6 +66,10 @@ def simm(self):
@property
def reg(self):
return self.value.reg

@property
def reg_pair(self):
return self.value.reg_pair

@property
def mem(self):
Expand Down
4 changes: 2 additions & 2 deletions bindings/python/capstone/mos65xx.py
Original file line number Diff line number Diff line change
Expand Up @@ -8,8 +8,8 @@
class MOS65xxOpValue(ctypes.Union):
_fields_ = (
('reg', ctypes.c_uint),
('imm', ctypes.c_uint8),
('mem', ctypes.c_uint16),
('imm', ctypes.c_uint16),
('mem', ctypes.c_uint32),
)

class MOS65xxOp(ctypes.Structure):
Expand Down
17 changes: 15 additions & 2 deletions bindings/python/capstone/x86.py
Original file line number Diff line number Diff line change
Expand Up @@ -43,6 +43,11 @@ def reg(self):
def mem(self):
return self.value.mem

class X86Flags(ctypes.Union):
_fields_ = (
('eflags', ctypes.c_uint64),
('fpu_flags', ctypes.c_uint64),
)

class CsX86Encoding(ctypes.Structure):
_fields_ = (
Expand Down Expand Up @@ -70,16 +75,24 @@ class CsX86(ctypes.Structure):
('avx_cc', ctypes.c_uint),
('avx_sae', ctypes.c_bool),
('avx_rm', ctypes.c_uint),
('eflags', ctypes.c_uint64),
('flags', X86Flags),
('op_count', ctypes.c_uint8),
('operands', X86Op * 8),
('encoding', CsX86Encoding),
)

@property
def eflags(self):
return self.flags.eflags

@property
def fpu_flags(self):
return self.flags.fpu_flags

def get_arch_info(a):
return (a.prefix[:], a.opcode[:], a.rex, a.addr_size, \
a.modrm, a.sib, a.disp, a.sib_index, a.sib_scale, \
a.sib_base, a.xop_cc, a.sse_cc, a.avx_cc, a.avx_sae, a.avx_rm, a.eflags, \
a.sib_base, a.xop_cc, a.sse_cc, a.avx_cc, a.avx_sae, a.avx_rm, a.eflags, a.fpu_flags, \
a.encoding, a.encoding.modrm_offset, a.encoding.disp_offset, a.encoding.disp_size, a.encoding.imm_offset, a.encoding.imm_size, \
copy_ctypes_list(a.operands[:a.op_count]))

2 changes: 1 addition & 1 deletion bindings/python/pyx/ccapstone.pyx
Original file line number Diff line number Diff line change
Expand Up @@ -34,7 +34,7 @@ class CsDetail(object):
self.modrm, self.sib, self.disp, \
self.sib_index, self.sib_scale, self.sib_base, \
self.xop_cc, self.sse_cc, self.avx_cc, self.avx_sae, self.avx_rm, \
self.eflags, self.encoding, self.modrm_offset, self.disp_offset, \
self.eflags, self.fpu_flags, self.encoding, self.modrm_offset, self.disp_offset, \
self.disp_size, self.imm_offset, self.imm_size, self.operands) = x86.get_arch_info(detail.arch.x86)
elif arch == capstone.CS_ARCH_M68K:
(self.operands, self.op_size) = m68k.get_arch_info(detail.arch.m68k)
Expand Down