Skip to content

This time actually fix big endian issue. #2530

New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

Sign up for GitHub

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Merged
kabeor merged 1 commit into from
Oct 29, 2024
Merged

This time actually fix big endian issue. #2530

Show file tree
Hide file tree
Changes from all commits
Commits
Show all changes
1 commit
Select commit
File filter

Filter by extension

Filter by extension
Conversations
Failed to load comments.
Loading
Jump to
Jump to file
Failed to load files.
Loading
Diff view
Diff view
6 changes: 3 additions & 3 deletions bindings/python/capstone/aarch64.py
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -52,14 +52,14 @@ class AArch64SysOpSysReg(ctypes.Union):
('sysreg', ctypes.c_uint),
('tlbi', ctypes.c_uint),
('ic', ctypes.c_uint),
('raw_val', ctypes.c_uint64),
('raw_val', ctypes.c_int),
)

class AArch64SysOpSysImm(ctypes.Union):
_fields_ = (
('dbnxs', ctypes.c_uint),
('exactfpimm', ctypes.c_uint),
('raw_val', ctypes.c_uint64),
('raw_val', ctypes.c_int),
)

class AArch64SysOpSysAlias(ctypes.Union):
Expand All @@ -79,7 +79,7 @@ class AArch64SysOpSysAlias(ctypes.Union):
('bti', ctypes.c_uint),
('svepredpat', ctypes.c_uint),
('sveveclenspecifier', ctypes.c_uint),
('raw_val', ctypes.c_uint64),
('raw_val', ctypes.c_int),
)
class AArch64SysOp(ctypes.Structure):
_fields_ = (
Expand Down
6 changes: 3 additions & 3 deletions bindings/python/cstest_py/src/cstest_py/details.py
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -755,7 +755,7 @@ def test_expected_aarch64(actual: CsInsn, expected: dict) -> bool:
aop.sysop.sub_type, eop.get("sub_type"), "sub_type"
):
return False
if not compare_uint64(
if not compare_int32(
aop.sysop.reg.raw_val, eop.get("sys_raw_val"), "sys_raw_val"
):
return False
Expand All @@ -764,7 +764,7 @@ def test_expected_aarch64(actual: CsInsn, expected: dict) -> bool:
aop.sysop.sub_type, eop.get("sub_type"), "sub_type"
):
return False
if not compare_uint64(
if not compare_int32(
aop.sysop.imm.raw_val, eop.get("sys_raw_val"), "sys_raw_val"
):
return False
Expand All @@ -778,7 +778,7 @@ def test_expected_aarch64(actual: CsInsn, expected: dict) -> bool:
aop.sysop.sub_type, eop.get("sub_type"), "sub_type"
):
return False
if not compare_uint64(
if not compare_int32(
aop.sysop.alias.raw_val, eop.get("sys_raw_val"), "sys_raw_val"
):
return False
Expand Down
6 changes: 3 additions & 3 deletions include/capstone/aarch64.h
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -1972,13 +1972,13 @@ typedef union {
aarch64_sysreg sysreg;
aarch64_tlbi tlbi;
aarch64_ic ic;
uint64_t raw_val;
int raw_val;
} aarch64_sysop_reg;

typedef union {
aarch64_dbnxs dbnxs;
aarch64_exactfpimm exactfpimm;
uint64_t raw_val;
int raw_val;
} aarch64_sysop_imm;

typedef union {
Expand All @@ -1997,7 +1997,7 @@ typedef union {
aarch64_bti bti;
aarch64_svepredpat svepredpat;
aarch64_sveveclenspecifier sveveclenspecifier;
uint64_t raw_val;
int raw_val;
} aarch64_sysop_alias;

/// Operand type for instruction's operands
Expand Down
2 changes: 1 addition & 1 deletion suite/cstest/include/test_detail_aarch64.h
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -58,7 +58,7 @@ typedef struct {
int8_t imm_range_offset;
double fp;
bool fp_set; /// Only relevant for SysOps with EXACTFPIMM
uint64_t sys_raw_val;
int sys_raw_val;

TestDetailAArch64SME *sme;

Expand Down
6 changes: 3 additions & 3 deletions suite/cstest/src/test_detail_aarch64.c
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -180,13 +180,13 @@ bool test_expected_aarch64(csh *handle, cs_aarch64 *actual,
case AARCH64_OP_SYSREG:
compare_enum_ret(op->sysop.sub_type, eop->sub_type,
false);
compare_uint64_ret(op->sysop.reg.raw_val,
compare_int_ret(op->sysop.reg.raw_val,
eop->sys_raw_val, false);
break;
case AARCH64_OP_SYSIMM:
compare_enum_ret(op->sysop.sub_type, eop->sub_type,
false);
compare_uint64_ret(op->sysop.imm.raw_val,
compare_int_ret(op->sysop.imm.raw_val,
eop->sys_raw_val, false);
if (eop->fp_set) {
compare_fp_ret(op->fp, eop->fp, false);
Expand All @@ -195,7 +195,7 @@ bool test_expected_aarch64(csh *handle, cs_aarch64 *actual,
case AARCH64_OP_SYSALIAS:
compare_enum_ret(op->sysop.sub_type, eop->sub_type,
false);
compare_uint64_ret(op->sysop.alias.raw_val,
compare_int_ret(op->sysop.alias.raw_val,
eop->sys_raw_val, false);
break;
case AARCH64_OP_MEM:
Expand Down