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Description
Thanks for the code :)
I'm currently using your test to help debug a problematic custom-made CC3000 board.
I'm consistently getting first packet success and second packet failure.
The second (bad) packet is consistently all high up until the last byte, and this last byte tends to be variable when the test is repeated multiple times.
Do you have any ideas about interpreting this, or what it might mean for locating the fault?
Testing first packet:
Expected: 2 0 FF 0 0 0 0 0 0 0
Received: 2 0 FF 0 0 0 0 0 0 0
Testing second packet:
Expected: 2 0 0 0 5 4 0 40 1 0
Received: FF FF FF FF FF FF FF FF FF E0
PROBLEMS WITH THE SECOND PACKET!
Testing first packet:
Expected: 2 0 FF 0 0 0 0 0 0 0
Received: 2 0 FF 0 0 0 0 0 0 0
Testing second packet:
Expected: 2 0 0 0 5 4 0 40 1 0
Received: FF FF FF FF FF FF FF FF FF FC
PROBLEMS WITH THE SECOND PACKET!