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Crypto arm64 intrinsics#16657
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briansull
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Feb 28, 2018
| emitDispReg(id->idReg2(), size, true); | ||
| emitDispVectorReg(id->idReg3(), id->idInsOpt(), false); | ||
| } | ||
| else |
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A comment stating which instructions are handled would be good here.
It looks like there are these two: sha1su0, sha256su1
And another comment below:
// Vd.4S,Vn.4S,Vm.4S
If you want the 4S suffixes to get displayed you might have to do more...
CarolEidt
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Feb 28, 2018
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LGTM. @briansull when you are happy with this can you merge it?
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I will merge it as is. |
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Arm64 intrinsics for Crypto Operations.
Refer: #16499