Review the list of ISAs support for which we generate detection code

[tannergooding]

We are currently generating detection code for several ISAs and allowing a few others through on R2R: https://github.com/dotnet/runtime/blob/master/src/coreclr/src/tools/Common/JitInterface/CorInfoImpl.cs#L2839-L2906

One of the ISAs we generate detection code for is LZCNT and while this ISA was released on AMD chips in 2007 (Barcelona) they weren't implemented on Intel chips until 2013 (Haswell) which is the same time they released AVX2, BMI1, BMI2, and FMA3.

While it is fine to generate a check for this ISA (as it doesn't use the VEX encoding), it seems out of place when viewed in context with the other possible ISAs we could generate checks for and what we use for R2R. So it may be worth reviewing which ISAs we allow here.

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[tannergooding]

CC. @davidwrighton, @jkotas, @MichalStrehovsky

[tannergooding]

Namely, POPCNT was released at the same time as LZCNT for AMD (2007, Barcelona) while it was introduced alongside SSE4.2 for Intel (2008, Nehalem).

So I would expect we support generating checks for SSE41, SSE42, and POPCNT as well (covering all non-vex encoded ISAs) or that LZCNT isn't allowed.

I'm unsure quite how this impacts R2R, the code generated (do we have checks emitted?), and when we decide to rejit or not.

[davidwrighton]

I have an document that I'll publish with the next update to my large instruction set adjustment pr that should make some of this more clear. What I can say is that today's crossgen1 generates a function call to the IsSupported method for Lzcnt, and then if it returned true, will use the lzcnt instruction otherwise it will do the software fallback.

[EgorBo]

Wonder if non-constant checks for lzcnt/popcnt make some software fallbacks faster than the hw acceleration + check (e.g. BitOperations.cs). These checks also make functions bigger.

[tannergooding]

I would imagine there are a few places like that. I think it's actually a full call which returns a constant true/false, rather than an inline cmp against a cached CPUID check, so it isn't even necessarily cheap/predictable.

[davidwrighton]

@tannergooding I've taken a look at what we claim here currently, and I believe it is good for .NET 5. Do you agree? If so, please close this issue.