RyuJIT: Recognize BLSR in "x & (x-1)"

[EgorBo]

Found in #63285, the following pattern:

int Foo(int x) => x & (x - 1);

has this codegen on x86/64:

lea      eax, [rdx-1]
and      eax, edx

Expected codegen:

blsr     eax, edx

Should be pretty straightforward to implement in lowerxarch.cpp by replacing AND(X, SUB(X, 1) with HWINTRINSIC ResetLowestSetBit (X), leaving it here for anyone who is interested in contributing to RyuJIT.

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Issue Details

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Found in #63285, the following pattern:

int Foo(int x) => x & (x - 1);

has this codegen on x86/64:

lea      eax, [rdx-1]
and      eax, edx

Expected codegen:

blsr     eax, edx

Should be pretty straightforward to implement in Lower.cpp by replace AND(SUB with HWINTRINSIC ResetLowestSetBit, leaving it here for anyone who is interested to contribute to RyuJIT.

Author:	EgorBo
Assignees:	-
Labels:	tenet-performance, area-CodeGen-coreclr, untriaged
Milestone:	-