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[LoongArch64] fix the arg regs' loop depending. #85085

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Merged
jakobbotsch merged 2 commits into from
Apr 21, 2023
Merged

[LoongArch64] fix the arg regs' loop depending. #85085

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2909b25
[LoongArch64] fix the arg regs' loop depending.
shushanhf Apr 20, 2023
8f69ef3
amend the value naming by CR.
shushanhf Apr 21, 2023
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124 changes: 66 additions & 58 deletions src/coreclr/jit/codegenloongarch64.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -8575,7 +8575,7 @@ void CodeGen::genFnPrologCalleeRegArgs()

unsigned varNum;
unsigned regArgMaskIsInt = 0;
unsigned regArgNum = 0;
int regArgNum = 0;
// Process any circular dependencies
unsigned regArg[MAX_REG_ARG * 2] = {0};
unsigned regArgInit[MAX_REG_ARG * 2] = {0};
Expand Down Expand Up @@ -8925,75 +8925,83 @@ void CodeGen::genFnPrologCalleeRegArgs()
assert(genIsValidIntReg((regNumber)regArg[i]));
assert(genIsValidIntReg((regNumber)regArgInit[i]));

regArgNum--;
regArgMaskLive &= ~genRegMask((regNumber)regArg[i]);
if ((regArgMaskIsInt & (1 << regArg[i])) != 0)
unsigned tmpRegs[MAX_REG_ARG] = {0};

unsigned tmpArg = regArg[i];
unsigned nextReg = regArgInit[i] - REG_ARG_FIRST;

assert(tmpArg <= REG_ARG_LAST);
assert(nextReg < MAX_REG_ARG);
assert(nextReg != i);

regArg[i] = 0;
int count = 0;

while (regArg[nextReg] != 0)
{
ins = INS_slli_w;
tmpRegs[count] = nextReg;
nextReg = regArgInit[nextReg] - REG_ARG_FIRST;
assert(nextReg < MAX_REG_ARG);

for (int count2 = 0; count2 < count; count2++)
{
if (nextReg == tmpRegs[count2])
{
NYI_LOONGARCH64("-----------CodeGen::genFnPrologCalleeRegArgs() error: intRegs!");
}
}

count++;
}

if (nextReg == i)
{
GetEmitter()->emitIns_R_R_I(INS_ori, EA_PTRSIZE, REG_R21, (regNumber)tmpArg, 0);
regArgMaskLive &= ~genRegMask((regNumber)tmpArg);
assert(count > 0);
}
else if (count == 0)
{
tmpRegs[0] = i;
regArg[i] = tmpArg;
}
else
{
ins = INS_ori;
count--;
}

if (regArgNum == 0)
do
{
GetEmitter()->emitIns_R_R_I(ins, EA_PTRSIZE, (regNumber)regArgInit[i], (regNumber)regArg[i], 0);
break;
}
else if (regArgInit[i] > regArg[i])
tmpArg = tmpRegs[count];

instruction ins = (regArgMaskIsInt & (1 << regArg[tmpArg])) != 0 ? INS_slli_w : INS_ori;
GetEmitter()->emitIns_R_R_I(ins, EA_PTRSIZE, (regNumber)regArgInit[tmpArg],
(regNumber)regArg[tmpArg], 0);

regArgMaskLive &= ~genRegMask((regNumber)regArg[tmpArg]);
regArg[tmpArg] = 0;
count--;
regArgNum--;
assert(regArgNum >= 0);
} while (count >= 0);

if (nextReg == i)
{
GetEmitter()->emitIns_R_R_I(ins, EA_PTRSIZE, (regNumber)regArgInit[i], (regNumber)regArg[i], 0);
instruction ins = (regArgMaskIsInt & (1 << regArg[i])) != 0 ? INS_slli_w : INS_ori;
GetEmitter()->emitIns_R_R_I(ins, EA_PTRSIZE, (regNumber)regArgInit[i], REG_R21, 0);
regArgNum--;
assert(regArgNum >= 0);
}
else
else if (tmpRegs[0] != i)
{
assert(i > 0);
assert(regArgNum > 0);
instruction ins = (regArgMaskIsInt & (1 << (i + REG_ARG_FIRST))) != 0 ? INS_slli_w : INS_ori;
GetEmitter()->emitIns_R_R_I(ins, EA_PTRSIZE, (regNumber)regArgInit[i],
(regNumber)(i + REG_ARG_FIRST), 0);

int j = regArgInit[i] - REG_ARG_FIRST;
assert((j >= 0) && (j < MAX_REG_ARG));
if (regArg[j] == 0)
{
GetEmitter()->emitIns_R_R_I(ins, EA_PTRSIZE, (regNumber)regArgInit[i], (regNumber)regArg[i], 0);
}
else
{
int k = regArgInit[j] - REG_ARG_FIRST;
assert((k >= 0) && (k < MAX_REG_ARG));
instruction ins2 = (regArgMaskIsInt & (1 << regArg[j])) != 0 ? INS_slli_w : INS_ori;
if ((regArg[k] == 0) || (k > i))
{
GetEmitter()->emitIns_R_R_I(ins2, EA_PTRSIZE, (regNumber)regArgInit[j],
(regNumber)regArg[j], 0);
GetEmitter()->emitIns_R_R_I(ins, EA_PTRSIZE, (regNumber)regArgInit[i], (regNumber)regArg[i],
0);
regArgNum--;
regArgMaskLive &= ~genRegMask((regNumber)regArg[j]);
if (regArgNum == 0)
{
break;
}
}
else if (k == i)
{
GetEmitter()->emitIns_R_R_I(ins, EA_PTRSIZE, REG_R21, (regNumber)regArg[i], 0);
GetEmitter()->emitIns_R_R_I(ins2, EA_PTRSIZE, (regNumber)regArgInit[j],
(regNumber)regArg[j], 0);
GetEmitter()->emitIns_R_R_I(INS_ori, EA_PTRSIZE, (regNumber)regArgInit[i], REG_R21, 0);
regArgNum--;
regArgMaskLive &= ~genRegMask((regNumber)regArg[j]);
regArg[j] = 0;
if (regArgNum == 0)
{
break;
}
}
else
{
NYI_LOONGARCH64("-----------CodeGen::genFnPrologCalleeRegArgs() error!--");
}
}
regArgMaskLive &= ~genRegMask((regNumber)(i + REG_ARG_FIRST));
regArgNum--;
}
assert(regArgNum >= 0);
}
}

Expand Down