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JIT: Remove loop-related VN quirks #95729
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Some minor diffs expected from increased VN precision around newly recognized loops, which leads to different CSEs.
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Tagging subscribers to this area: @JulieLeeMSFT, @jakobbotsch Issue DetailsSome minor diffs expected from increased VN precision around newly recognized loops, which leads to different CSEs.
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Hitting a loop alignment related assert I'll need to investigate: ISSUE: <ASSERT> #567048 D:\a\_work\1\s\src\coreclr\jit\emit.cpp (4636) - Assertion failed '(jmpGroup->igFlags & IGF_HAS_ALIGN) == 0' in 'System.Security.Cryptography.Tests.RandomNumberGeneratorTests:VerifyDistribution[ushort](System.ReadOnlySpan`1[ushort],double)' during 'Generate code' (IL size 218; hash 0x53d500b4; Tier1) |
I think we have similar asserts in the outerloop PGO pipeline in Main, will file an issue |
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It does seem to be related to the change here. Any ideas? Do we need to force a new IG after an IG that is a candidate for jmp removal, or before a basic block that is marked for align insertion? |
The one in #95755 seems to be different than what @jakobbotsch is getting and most likely happening due to recent changes in jump removal. I will take a look at both of these. |
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The issue repros on main if you comment the following code: runtime/src/coreclr/jit/optimizer.cpp Lines 8704 to 8714 in 9080024
and then run linux-x64 libraries_Tests.run SPMI: |
We shouldn't force a new IG in such case because that defeats the purpose of placing the BTW, it occurred to me, I don't see that we mark the new loops detected in runtime/src/coreclr/jit/optimizer.cpp Lines 5541 to 5544 in 6de7549
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Yes, but I am focusing on porting everything first, before enabling optimizations for new loops (which I will do in individual PRs after). |
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cc @dotnet/jit-contrib PTAL @BruceForstall Diffs. As mentioned above it's because of some increased precision in VN in some cases, leading to different CSEs. |
Some minor diffs expected from increased VN precision around newly recognized loops, which leads to different CSEs.