Device_Programming Programming Languages : VHDL(VHSIC Hardware Description Language) Development Environment : Quartus II & Simulation Tool : Modelsim-Altera(RTL & Gate Level Simulation) Lab Code Assignment Based on Computer Logic design, various logic is designed using HDL (Hardware Description Language) etc. Lab 02. Sequence Detector Lab 03. One-Counter Design Lab 04.ROM을 이용한 Combinational Logic 설계 Lab 05. Microprogramming Logic Design Mini-Lab 06. RAM 분석(Simulation을 통한 동작 분석) Lab 07. RAM 기반 Data Processor 구현 Lab 08. Elementary dedicated microprocessor Lab 09. General CPU design 1 Lab 10. General CPU design 2 Lab 11. Simple CPU design