kernel: bump to 4.4.65

include/kernel-version.mk

@@ -3,11 +3,11 @@
 LINUX_RELEASE?=1
 
 LINUX_VERSION-3.18 = .43
-LINUX_VERSION-4.4 = .61
+LINUX_VERSION-4.4 = .65
 LINUX_VERSION-4.9 = .20
 
 LINUX_KERNEL_HASH-3.18.43 = 1236e8123a6ce537d5029232560966feed054ae31776fe8481dd7d18cdd5492c
-LINUX_KERNEL_HASH-4.4.61 = 30dee7164615ad8184eba4ea6f4906b3ceb2fe462a8a4a929c8e9aab8d4a31da
+LINUX_KERNEL_HASH-4.4.65 = 61f472f5ebc200a6842492bbf5ec6bf78e9bf5ef57813f6e48a98f4a000aabed
 LINUX_KERNEL_HASH-4.9.20 = 48660806dd32fb8dcbcf5932291bf6cc7d29240070372230871e0f56fea81341
 
 ifdef KERNEL_PATCHVER

target/linux/ar71xx/patches-4.4/525-MIPS-ath79-enable-qca-usb-quirks.patch

@@ -29,9 +29,7 @@
 -	u32 bootstrap;
 +	void __iomem *phy_reg;
 +	u32 t;
-
--	bootstrap = ath79_reset_rr(AR934X_RESET_REG_BOOTSTRAP);
--	if (bootstrap & AR934X_BOOTSTRAP_USB_MODE_DEVICE)
++
 +	phy_reg = ioremap(base, 4);
 +	if (!phy_reg)
 +		return;
@@ -43,7 +41,9 @@
 +
 +	iounmap(phy_reg);
 +}
-+
+
+-	bootstrap = ath79_reset_rr(AR934X_RESET_REG_BOOTSTRAP);
+-	if (bootstrap & AR934X_BOOTSTRAP_USB_MODE_DEVICE)
 +static void ar934x_usb_reset_notifier(struct platform_device *pdev)
 +{
 +	if (pdev->id != -1)

target/linux/ar71xx/patches-4.4/601-MIPS-ath79-add-more-register-defines.patch

@@ -155,7 +155,7 @@
 +#define AR934X_RESET_LUT		BIT(2)
 +#define AR934X_RESET_MBOX		BIT(1)
 +#define AR934X_RESET_I2S		BIT(0)
- 
++
 +#define QCA955X_RESET_HOST		BIT(31)
 +#define QCA955X_RESET_SLIC		BIT(30)
 +#define QCA955X_RESET_HDMA		BIT(29)
@@ -188,7 +188,7 @@
 +#define QCA955X_RESET_LUT		BIT(2)
 +#define QCA955X_RESET_MBOX		BIT(1)
 +#define QCA955X_RESET_I2S		BIT(0)
-+
+ 
 +#define AR933X_BOOTSTRAP_MDIO_GPIO_EN	BIT(18)
 +#define AR933X_BOOTSTRAP_EEPBUSY	BIT(4)
  #define AR933X_BOOTSTRAP_REF_CLK_40	BIT(0)

target/linux/ar71xx/patches-4.4/609-MIPS-ath79-ap136-fixes.patch

@@ -135,8 +135,7 @@
 +static void __init ap136_common_setup(void)
 +{
 +	u8 *art = (u8 *) KSEG1ADDR(0x1fff0000);
-
--static int ap136_pci_plat_dev_init(struct pci_dev *dev)
++
 +	ath79_register_m25p80(NULL);
 +
 +	ath79_register_leds_gpio(-1, ARRAY_SIZE(ap136_leds_gpio),
@@ -151,7 +150,8 @@
 +	ath79_register_wmac(art + AP136_WMAC_CALDATA_OFFSET, NULL);
 +
 +	ath79_setup_qca955x_eth_cfg(QCA955X_ETH_CFG_RGMII_EN);
-+
+
+-static int ap136_pci_plat_dev_init(struct pci_dev *dev)
 +	ath79_register_mdio(0, 0x0);
 +	ath79_init_mac(ath79_eth0_data.mac_addr, art + AP136_MAC0_OFFSET, 0);
 +
@@ -211,16 +211,16 @@
 +	/* GMAC0 of the AR8327 switch is connected to GMAC1 via SGMII */
 +	ap136_ar8327_pad0_cfg.mode = AR8327_PAD_MAC_SGMII;
 +	ap136_ar8327_pad0_cfg.sgmii_delay_en = true;
-
--	ath79_pci_set_plat_dev_init(ap136_pci_plat_dev_init);
--	ath79_register_pci();
++
 +	/* GMAC6 of the AR8327 switch is connected to GMAC0 via RGMII */
 +	ap136_ar8327_pad6_cfg.mode = AR8327_PAD_MAC_RGMII;
 +	ap136_ar8327_pad6_cfg.txclk_delay_en = true;
 +	ap136_ar8327_pad6_cfg.rxclk_delay_en = true;
 +	ap136_ar8327_pad6_cfg.txclk_delay_sel = AR8327_CLK_DELAY_SEL1;
 +	ap136_ar8327_pad6_cfg.rxclk_delay_sel = AR8327_CLK_DELAY_SEL2;
-+
+
+-	ath79_pci_set_plat_dev_init(ap136_pci_plat_dev_init);
+-	ath79_register_pci();
 +	ath79_eth0_pll_data.pll_1000 = 0x56000000;
 +	ath79_eth1_pll_data.pll_1000 = 0x03000101;
 +

target/linux/generic/patches-4.4/040-0002-mtd-bcm47xxpart-don-t-fail-because-of-bit-flips.patch

@@ -59,7 +59,7 @@ Signed-off-by: Brian Norris <computersforpeace@gmail.com>
  			continue;
  		}
 
-@@ -254,10 +258,11 @@ static int bcm47xxpart_parse(struct mtd_
+@@ -252,10 +256,11 @@ static int bcm47xxpart_parse(struct mtd_
  		}
 
  		/* Read middle of the block */
@@ -75,7 +75,7 @@ Signed-off-by: Brian Norris <computersforpeace@gmail.com>
  			continue;
  		}
 
-@@ -277,10 +282,11 @@ static int bcm47xxpart_parse(struct mtd_
+@@ -275,10 +280,11 @@ static int bcm47xxpart_parse(struct mtd_
  		}
 
  		offset = master->size - possible_nvram_sizes[i];