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AMD Venice JSON Perf Events patches for VeLinux (6.6 kernel)#123

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AMD Venice JSON Perf Events patches for VeLinux (6.6 kernel)#123
mohanasv2 wants to merge 4 commits into
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@mohanasv2 mohanasv2 commented Mar 12, 2026 •
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AMD Venice Json Perf Event Patches For VeLinux (6.6 kernel)

  1. perf vendor events amd: Add Zen 6 mapping
  2. perf vendor events amd: Add Zen 6 core events
  3. perf vendor events amd: Add Zen 6 uncore events
  4. perf vendor events amd: Add Zen 6 metrics

This patch series contains 4 commits that add support for AMD Zen 6 performance monitoring in the Linux perf tool. The changes introduce new JSON event files and mappings for core, uncore, and vendor-specific metrics, enabling detailed performance analysis on Family 1Ah Model 50h–57h processors.

Feature Additions

  • Core events: Counters for op dispatch, execution/retirement, branch prediction, L1/L2 cache activity, and TLB usage.
  • Uncore events: Counters for L3 cache and UMC command activity.
  • Pipeline utilization metrics: Guidance-based statistics for Level 1 and Level 2 pipeline analysis, useful for identifying bottlenecks.
  • Mapping updates: Regular expressions added to correctly associate Zen 6 processors with their JSON event files, while restricting Zen 5 mappings to known model ranges.

Benefits

  • Expands perf’s coverage to the latest AMD Zen 6 CPUs.
  • Provides vendor-recommended metrics for both core and uncore analysis.
  • Improves usability by aligning event definitions with AMD documentation.
  • Ensures bisectability and consistency across kernel versions.

Unit Test

#./perf list | grep -e de_dispatch_stall_cycle_dynamic_tokens_part2 -e fp_ops_ret_by_type.vector -e fp_pack_512b_ops_ret -e fp_pack_int_ops_ret -e ic_fills_from_sys -e l2_sys_bw
  de_dispatch_stall_cycle_dynamic_tokens_part2.ag_tokens
  de_dispatch_stall_cycle_dynamic_tokens_part2.al_tokens
  de_dispatch_stall_cycle_dynamic_tokens_part2.ex_flush_recovery
  de_dispatch_stall_cycle_dynamic_tokens_part2.retq

With patches
# ./perf list | grep -e de_dispatch_stall_cycle_dynamic_tokens_part2 -e fp_ops_ret_by_type.vector -e fp_pack_512b_ops_ret -e fp_pack_int_ops_ret -e ic_fills_from_sys -e l2_sys_bw
  de_dispatch_stall_cycle_dynamic_tokens_part2.all
  de_dispatch_stall_cycle_dynamic_tokens_part2.int_sq0
  de_dispatch_stall_cycle_dynamic_tokens_part2.int_sq1
  de_dispatch_stall_cycle_dynamic_tokens_part2.int_sq2
  de_dispatch_stall_cycle_dynamic_tokens_part2.int_sq3
  de_dispatch_stall_cycle_dynamic_tokens_part2.int_sq4
  de_dispatch_stall_cycle_dynamic_tokens_part2.int_sq5
  de_dispatch_stall_cycle_dynamic_tokens_part2.ret_q
  fp_ops_ret_by_type.vector_add
  fp_ops_ret_by_type.vector_all
  fp_ops_ret_by_type.vector_bfloat
  fp_ops_ret_by_type.vector_blend
  fp_ops_ret_by_type.vector_cmp
  fp_ops_ret_by_type.vector_cvt
  fp_ops_ret_by_type.vector_div
  fp_ops_ret_by_type.vector_logical
  fp_ops_ret_by_type.vector_mac
  fp_ops_ret_by_type.vector_move
  fp_ops_ret_by_type.vector_mul
  fp_ops_ret_by_type.vector_other
  fp_ops_ret_by_type.vector_shuffle
  fp_ops_ret_by_type.vector_sqrt
  fp_ops_ret_by_type.vector_sub
  fp_pack_512b_ops_ret.512b_all
  fp_pack_512b_ops_ret.fp512_add
  fp_pack_512b_ops_ret.fp512_all
  fp_pack_512b_ops_ret.fp512_bfloat
  fp_pack_512b_ops_ret.fp512_blend
  fp_pack_512b_ops_ret.fp512_cmp
  fp_pack_512b_ops_ret.fp512_cvt
  fp_pack_512b_ops_ret.fp512_div
  fp_pack_512b_ops_ret.fp512_logical
  fp_pack_512b_ops_ret.fp512_mac
  fp_pack_512b_ops_ret.fp512_mov
  fp_pack_512b_ops_ret.fp512_mul
  fp_pack_512b_ops_ret.fp512_other
  fp_pack_512b_ops_ret.fp512_shuffle
  fp_pack_512b_ops_ret.fp512_sqrt
  fp_pack_512b_ops_ret.fp512_sub
  fp_pack_512b_ops_ret.int512_add
  fp_pack_512b_ops_ret.int512_aes
  fp_pack_512b_ops_ret.int512_all
  fp_pack_512b_ops_ret.int512_cmp
  fp_pack_512b_ops_ret.int512_cvt
  fp_pack_512b_ops_ret.int512_logical
  fp_pack_512b_ops_ret.int512_mac
  fp_pack_512b_ops_ret.int512_mov
  fp_pack_512b_ops_ret.int512_mul
  fp_pack_512b_ops_ret.int512_other
  fp_pack_512b_ops_ret.int512_sha
  fp_pack_512b_ops_ret.int512_shift
  fp_pack_512b_ops_ret.int512_shuffle
  fp_pack_512b_ops_ret.int512_sub
  fp_pack_512b_ops_ret.int512_vnni
  fp_pack_int_ops_ret.int128_add
  fp_pack_int_ops_ret.int128_aes
  fp_pack_int_ops_ret.int128_all
  fp_pack_int_ops_ret.int128_cmp
  fp_pack_int_ops_ret.int128_cvt
  fp_pack_int_ops_ret.int128_logical
  fp_pack_int_ops_ret.int128_mac
  fp_pack_int_ops_ret.int128_mov
  fp_pack_int_ops_ret.int128_mul
  fp_pack_int_ops_ret.int128_other
  fp_pack_int_ops_ret.int128_sha
  fp_pack_int_ops_ret.int128_shift
  fp_pack_int_ops_ret.int128_shuffle
  fp_pack_int_ops_ret.int128_sub
  fp_pack_int_ops_ret.int128_vnni
  fp_pack_int_ops_ret.int256_add
  fp_pack_int_ops_ret.int256_all
  fp_pack_int_ops_ret.int256_cmp
  fp_pack_int_ops_ret.int256_logical
  fp_pack_int_ops_ret.int256_mac
  fp_pack_int_ops_ret.int256_mov
  fp_pack_int_ops_ret.int256_mul
  fp_pack_int_ops_ret.int256_other
  fp_pack_int_ops_ret.int256_shift
  fp_pack_int_ops_ret.int256_shuffle
  fp_pack_int_ops_ret.int256_sub
  fp_pack_int_ops_ret.int256_vnni
  fp_pack_int_ops_ret.int_all
  ic_fills_from_sys.all
  ic_fills_from_sys.alt_mem
  ic_fills_from_sys.dram_io_all
  ic_fills_from_sys.dram_io_far
  ic_fills_from_sys.dram_io_near
  ic_fills_from_sys.far_all
  ic_fills_from_sys.far_cache
  ic_fills_from_sys.local_all
  ic_fills_from_sys.local_ccx
  ic_fills_from_sys.local_l2
  ic_fills_from_sys.near_cache
  ic_fills_from_sys.remote_cache
  l2_sys_bw.all
  l2_sys_bw.local_dram_fill
  l2_sys_bw.local_scm_fill
  l2_sys_bw.nt_write
  l2_sys_bw.remote_dram_fill
  l2_sys_bw.remote_scm_fill
  l2_sys_bw.victim

sandip4n added 4 commits March 18, 2026 10:47
@sandip4n @mohanasv2
perf vendor events amd: Add Zen 6 mapping
58e5082 
commit 2c3cd43d27c1148fae05b50870f970ab24464fd5 upstream.

Add a regular expression in the map file so that appropriate JSON event
files are used for AMD Zen 6 processors. Restrict the regular expression
for AMD Zen 5 processors to known model ranges since they also belong to
Family 1Ah.

Reviewed-by: Ian Rogers <irogers@google.com>
Signed-off-by: Sandipan Das <sandipan.das@amd.com>
Cc: Adrian Hunter <adrian.hunter@intel.com>
Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Cc: Ananth Narayan <ananth.narayan@amd.com>
Cc: Caleb Biggers <caleb.biggers@intel.com>
Cc: Ingo Molnar <mingo@redhat.com>
Cc: James Clark <james.clark@linaro.org>
Cc: Jiri Olsa <jolsa@kernel.org>
Cc: Kan Liang <kan.liang@linux.intel.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Namhyung Kim <namhyung@kernel.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Ravi Bangoria <ravi.bangoria@amd.com>
Cc: Stephane Eranian <eranian@google.com>
[ Moved this one to the front of the series to keep the tree bisectable, as per Ian Rogers suggestion ]
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
Signed-off-by: Rahul Kumar <Kumar.Rahul2@amd.com>
Signed-off-by: mohanasv2 <mohanasv@amd.com>
@sandip4n @mohanasv2
perf vendor events amd: Add Zen 6 core events
dee911e 
commit 2f42fb0661d9a979800a506b6a91dc3a7d1fb162 upstream.

Add core events taken from Section 1.5 "Core Performance Monitor
Counters" of the Performance Monitor Counters for AMD Family 1Ah Model
50h-57h Processors document available at the link below.

This constitutes events which capture information on op dispatch,
execution and retirement, branch prediction, L1 and L2 cache activity,
TLB activity, etc.

Reviewed-by: Ian Rogers <irogers@google.com>
Signed-off-by: Sandipan Das <sandipan.das@amd.com>
Cc: Adrian Hunter <adrian.hunter@intel.com>
Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Cc: Ananth Narayan <ananth.narayan@amd.com>
Cc: Caleb Biggers <caleb.biggers@intel.com>
Cc: Ingo Molnar <mingo@redhat.com>
Cc: James Clark <james.clark@linaro.org>
Cc: Jiri Olsa <jolsa@kernel.org>
Cc: Kan Liang <kan.liang@linux.intel.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Namhyung Kim <namhyung@kernel.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Ravi Bangoria <ravi.bangoria@amd.com>
Cc: Stephane Eranian <eranian@google.com>
Link: https://bugzilla.kernel.org/attachment.cgi?id=309149
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
Signed-off-by: Rahul Kumar <Kumar.Rahul2@amd.com>
Signed-off-by: mohanasv2 <mohanasv@amd.com>
@sandip4n @mohanasv2
perf vendor events amd: Add Zen 6 uncore events
ccaaf3d 
commit de18394f8f69e4cb86e1561f3dd86e9f724b8f25 upstream.

Add uncore events taken from Section 1.6 "L3 Cache Performance Monitor
Counters" and Section 2.2 "UMC Performance Monitor Events" of the
Performance Monitor Counters for AMD Family 1Ah Model 50h-57h Processors
document available at the link below.

This constitutes events which capture L3 cache and UMC command activity.

Reviewed-by: Ian Rogers <irogers@google.com>
Signed-off-by: Sandipan Das <sandipan.das@amd.com>
Cc: Adrian Hunter <adrian.hunter@intel.com>
Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Cc: Ananth Narayan <ananth.narayan@amd.com>
Cc: Caleb Biggers <caleb.biggers@intel.com>
Cc: Ingo Molnar <mingo@redhat.com>
Cc: James Clark <james.clark@linaro.org>
Cc: Jiri Olsa <jolsa@kernel.org>
Cc: Kan Liang <kan.liang@linux.intel.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Namhyung Kim <namhyung@kernel.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Ravi Bangoria <ravi.bangoria@amd.com>
Cc: Stephane Eranian <eranian@google.com>
Link: https://bugzilla.kernel.org/attachment.cgi?id=309149
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
Signed-off-by: Rahul Kumar <Kumar.Rahul2@amd.com>
Signed-off-by: mohanasv2 <mohanasv@amd.com>
@sandip4n @mohanasv2
perf vendor events amd: Add Zen 6 metrics
3801c22 
commit d0a3df886d777180322a254176c40fd4a4a23cbe upstream.

Add metrics taken from Section 1.2 "Performance Measurement" of the
Performance Monitor Counters for AMD Family 1Ah Model 50h-57h Processors
document available at the link below.

The recommended metrics are sourced from Table 1 "Guidance for Common
Performance Statistics with Complex Event Selects".

The pipeline utilization metrics are sourced from Table 2 "Guidance
for Pipeline Utilization Analysis Statistics". These are useful for
finding performance bottlenecks by analyzing activity at different
stages of the pipeline. There are metric groups available for Level 1
and Level 2 analysis.

Reviewed-by: Ian Rogers <irogers@google.com>
Signed-off-by: Sandipan Das <sandipan.das@amd.com>
Cc: Adrian Hunter <adrian.hunter@intel.com>
Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Cc: Ananth Narayan <ananth.narayan@amd.com>
Cc: Caleb Biggers <caleb.biggers@intel.com>
Cc: Ingo Molnar <mingo@redhat.com>
Cc: James Clark <james.clark@linaro.org>
Cc: Jiri Olsa <jolsa@kernel.org>
Cc: Kan Liang <kan.liang@linux.intel.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Namhyung Kim <namhyung@kernel.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Ravi Bangoria <ravi.bangoria@amd.com>
Cc: Stephane Eranian <eranian@google.com>
Link: https://bugzilla.kernel.org/attachment.cgi?id=309149
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
Signed-off-by: Rahul Kumar <Kumar.Rahul2@amd.com>
Signed-off-by: mohanasv2 <mohanasv@amd.com>
@mohanasv2 mohanasv2 force-pushed the venice_json_perf_event branch from c35ef77 to 3801c22 Compare March 18, 2026 05:22
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3 participants

@mohanasv2 @guixiongwei @sandip4n