Skip to content

fix: wide-arithmetic, SIMD store lane, GC ops, linking, memory imports#159

Merged
avrabe merged 1 commit intomainfrom
fix/wast-conformance-batch3
Mar 16, 2026
Merged

fix: wide-arithmetic, SIMD store lane, GC ops, linking, memory imports#159
avrabe merged 1 commit intomainfrom
fix/wast-conformance-batch3

Conversation

@avrabe
Copy link
Copy Markdown
Collaborator

@avrabe avrabe commented Mar 16, 2026

Summary

  • Wide-arithmetic (0→109/109): i64.add128, sub128, mul_wide_s/u; fix 0xFC sub-opcode LEB128 reading
  • SIMD store lane (0→128/128): fix GlobalWrapper V128 serialization, global init expression parsing, local zero-init
  • GC validator + table ops: fix opcode assignments (ref.eq/ref.as_non_null/br_on_null/br_on_non_null), table.set/get/grow/fill accept GC refs, ref.null bottom types, relaxed SIMD validation, element segment const expr evaluator
  • Linking + memory imports (memory_grow: 0→51/51): resolve_registered_memory_imports, mutable global sharing, WAT execution, start function execution

Test plan

  • wide-arithmetic.wast: 109/109 fully passing
  • simd_store{8,16,32,64}_lane.wast: 128/128 fully passing
  • memory_grow.wast: 51/51 fully passing
  • ref_eq.wast: 6→85 passing
  • i31.wast: 31→59 passing
  • linking.wast: improved to 137/166
  • Full WAST suite: 62,788 → 63,405 passing (96.6%)
  • cargo check passes

Trace: skip

🤖 Generated with Claude Code

Wide-arithmetic (101→109/109 passing):
- Add i64.add128, i64.sub128, i64.mul_wide_s, i64.mul_wide_u instructions
- Fix 0xFC sub-opcode reading to use LEB128 (spec-correct)

SIMD store lane (0→128/128 passing):
- Fix GlobalWrapper serialization to handle V128 (16 bytes vs 8)
- Fix global init expression parser for 0xFD/0xFC/0xFB prefixed opcodes
- Fix local variable zero-initialization for V128/ref types

GC validator + table ops:
- Fix ref.eq/ref.as_non_null/br_on_null/br_on_non_null opcode assignments
- Add GC ref type support in table.set/get/grow/fill
- Fix ref.null to push correct GC bottom types in validator
- Add relaxed SIMD opcode classification in validator
- Fix element segment expression parsing for ref.i31
- Implement general-purpose constant expression evaluator for elem init

Linking + memory imports (memory_grow: 0→51/51 passing):
- Add resolve_registered_memory_imports for cross-module memory sharing
- Fix mutable global import sharing (Arc<RwLock> not copy)
- Implement WastExecute::Wat handling
- Execute start functions during module loading

WAST conformance: 62,788 → 63,405 passed (+617), 2,854 → 2,237 failed.

Trace: skip

Co-Authored-By: Claude Opus 4.6 (1M context) <noreply@anthropic.com>
@avrabe avrabe merged commit 6fa0bcc into main Mar 16, 2026
14 checks passed
@avrabe avrabe deleted the fix/wast-conformance-batch3 branch March 16, 2026 05:23
@github-actions
Copy link
Copy Markdown

🔍 Build Diagnostics Report

Summary

Metric Base Branch This PR Change
Errors 0 0 0
Warnings 2 2 0

🎯 Impact Analysis

Issues in Files You Modified

  • 0 new errors introduced by your changes
  • 0 new warnings introduced by your changes
  • 0 total errors in modified files
  • 0 total warnings in modified files
  • 0 files you modified

Cascading Issues (Your Changes Breaking Other Files)

  • 0 new errors in unchanged files
  • 0 new warnings in unchanged files
  • 0 unchanged files now affected

Note: "Cascading issues" are errors in files you didn't modify, caused by your changes (e.g., breaking API changes, dependency issues).

✅ No Issues Detected

Perfect! Your changes don't introduce any new errors or warnings, and don't break any existing code.


📊 Full diagnostic data available in workflow artifacts

🔧 To reproduce locally:

# Install cargo-kiln
cargo install --path cargo-kiln

# Analyze your changes
cargo-kiln build --output json --filter-severity error
cargo-kiln check --output json --filter-severity warning

Sign up for free to join this conversation on GitHub. Already have an account? Sign in to comment

Labels

None yet

Projects

None yet

Development

Successfully merging this pull request may close these issues.

1 participant