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12 changes: 3 additions & 9 deletions qiling/arch/arch.py
Original file line number Diff line number Diff line change
@@ -1,5 +1,5 @@
#!/usr/bin/env python3
#
#
# Cross Platform and Multi Architecture Advanced Binary Emulation Framework
#

Expand All @@ -15,6 +15,7 @@
from .register import QlRegisterManager
from .utils import QlArchUtils


class QlArch:
type: QL_ARCH
bits: int
Expand Down Expand Up @@ -57,7 +58,6 @@ def stack_push(self, value: int) -> int:

return self.regs.arch_sp


def stack_pop(self) -> int:
"""Pop a value from the architectural stack.

Expand All @@ -69,7 +69,6 @@ def stack_pop(self) -> int:

return data


def stack_read(self, offset: int) -> int:
"""Peek the architectural stack at a specified offset from its top, without affecting
the top of the stack.
Expand All @@ -86,7 +85,6 @@ def stack_read(self, offset: int) -> int:

return self.ql.mem.read_ptr(self.regs.arch_sp + offset)


def stack_write(self, offset: int, value: int) -> None:
"""Write a value to the architectural stack at a specified offset from its top, without
affecting the top of the stack.
Expand All @@ -101,17 +99,14 @@ def stack_write(self, offset: int, value: int) -> None:

self.ql.mem.write_ptr(self.regs.arch_sp + offset, value)


# Unicorn's CPU state save
def save(self) -> UcContext:
return self.uc.context_save()


# Unicorn's CPU state restore method
def restore(self, saved_context: UcContext):
self.uc.context_restore(saved_context)


@property
@abstractmethod
def disassembler(self) -> Cs:
Expand All @@ -120,7 +115,6 @@ def disassembler(self) -> Cs:

pass


@property
@abstractmethod
def assembler(self) -> Ks:
Expand All @@ -135,4 +129,4 @@ def endian(self) -> QL_ENDIAN:
"""Get processor endianess.
"""

pass
pass
7 changes: 5 additions & 2 deletions qiling/arch/arm.py
Original file line number Diff line number Diff line change
@@ -1,5 +1,5 @@
#!/usr/bin/env python3
#
#
# Cross Platform and Multi Architecture Advanced Binary Emulation Framework
#

Expand All @@ -15,6 +15,7 @@
from qiling.arch.register import QlRegisterManager
from qiling.const import QL_ARCH, QL_ENDIAN


class QlArchARM(QlArch):
type = QL_ARCH.ARM
bits = 32
Expand Down Expand Up @@ -43,7 +44,9 @@ def uc(self) -> Uc:
def regs(self) -> QlRegisterManager:
regs_map = dict(
**arm_const.reg_map,
**arm_const.reg_vfp
**arm_const.reg_vfp,
**arm_const.reg_map_q,
**arm_const.reg_map_s
)

pc_reg = 'pc'
Expand Down
3 changes: 2 additions & 1 deletion qiling/arch/arm64.py
Original file line number Diff line number Diff line change
@@ -1,5 +1,5 @@
#!/usr/bin/env python3
#
#
# Cross Platform and Multi Architecture Advanced Binary Emulation Framework
#

Expand All @@ -14,6 +14,7 @@
from qiling.arch.register import QlRegisterManager
from qiling.const import QL_ARCH, QL_ENDIAN


class QlArchARM64(QlArch):
type = QL_ARCH.ARM64
bits = 64
Expand Down
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