Profile sap-hana - force_latency setting leads to too deep sleep states

[PeterPitterling]

[profiles/sap-hana/tuned.conf]

force_latency=cstate.id_no_zero:3|70

last generations of Intel CPUs usually provide only POLL, C1, C1E and C6 sleep states

"cstate.id_no_zero:3" and calls _get_latency_by_cstate_id("3", no_zero=True).
That causes the plugin to read the cpuidle state 3 latency from sysfs (e.g. /sys/devices/system/cpu/cpu0/cpuidle/state3/latency)
which is C6 with latency 170µs in below case (Ice Lake CPU)

/sys/devices/system/cpu/cpu0/cpuidle/state3/disable:0
/sys/devices/system/cpu/cpu0/cpuidle/state3/latency:170
/sys/devices/system/cpu/cpu0/cpuidle/state3/name:C6
/sys/devices/system/cpu/cpu0/cpuidle/state1/disable:0
/sys/devices/system/cpu/cpu0/cpuidle/state1/latency:1
/sys/devices/system/cpu/cpu0/cpuidle/state1/name:C1
/sys/devices/system/cpu/cpu0/cpuidle/state2/disable:0
/sys/devices/system/cpu/cpu0/cpuidle/state2/latency:4
/sys/devices/system/cpu/cpu0/cpuidle/state2/name:C1E
/sys/devices/system/cpu/cpu0/cpuidle/state0/disable:0
/sys/devices/system/cpu/cpu0/cpuidle/state0/latency:0
/sys/devices/system/cpu/cpu0/cpuidle/state0/name:POLL

The same applies for almost all recent Intel CPUs

# CPU  | SKL+CLX   ICX  SPR/EMR     GNR      SFR
# POLL |      0      0        0       0        0
# C1   |      2      1        1       1        1
# C1E  |     10      4        2       4        2
# C3   |      -      -        -       -        -
# C6   |    133    170      190     170        -
# C6P  |      -               -     210        -
# C6S  |      -               -       -      270
# C6SP |      -               -       -      310