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ARM:XDATA: add check for complex lhs #195

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Merged
sipma merged 1 commit into from
Feb 4, 2025
Merged

ARM:XDATA: add check for complex lhs #195

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5 changes: 4 additions & 1 deletion chb/arm/opcodes/ARMStoreRegister.py
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Original file line number Diff line number Diff line change
Expand Up @@ -239,7 +239,10 @@ def ast_prov(
hl_lhs = XU.xmemory_dereference_lval(memaddr, xdata, iaddr, astree)

else:
chklogger.logger.error("Error value encountered at %s", iaddr)
chklogger.logger.error(
"STR: Lhs lval and address both have error values: skipping "
"store instruction at address %s",
iaddr)
return ([], [])

rhs = xd.xxrt
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14 changes: 10 additions & 4 deletions chb/arm/opcodes/ARMStoreRegisterByte.py
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Original file line number Diff line number Diff line change
Expand Up @@ -199,7 +199,9 @@ def ast_prov(

else:
chklogger.logger.error(
"Encountered error value at address %s", iaddr)
"STRB: Lhs lval and address both have error values: skipping "
+ "store instruction at address %s",
iaddr)
return ([], [])

rhs = xd.xxrt
Expand All @@ -222,9 +224,13 @@ def ast_prov(
bytestring=bytestring,
annotations=annotations)

# to highlight missing info, expose in the lifting store instructions
# that are unresolved
if xd.is_vmem_unknown:
# Currently def-use info does not properly account for assignments
# to variables that are part of a struct or array variable, so these
# assignments must be explicitly forced to appear in the lifting
if (
xd.is_vmem_unknown
or hl_lhs.offset.is_index_offset
or hl_lhs.offset.is_field_offset):
astree.add_expose_instruction(hl_assign.instrid)

astree.add_instr_mapping(hl_assign, ll_assign)
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14 changes: 11 additions & 3 deletions chb/arm/opcodes/ARMStoreRegisterHalfword.py
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Original file line number Diff line number Diff line change
Expand Up @@ -194,13 +194,14 @@ def ast_prov(
lhs, xdata, iaddr, astree, memaddr=memaddr)

elif xd.is_vmem_unknown and xd.is_address_known:
lhs = None
memaddr = xd.xaddr
hl_lhs = XU.xmemory_dereference_lval(memaddr, xdata, iaddr, astree)

else:
chklogger.logger.error(
"Encountered error value at address %s", iaddr)
"STRH: Lhs lval and address both have error values: skipping "
+ "store instruction at address %s",
iaddr)
return ([], [])

rhs = xd.xxrt
Expand All @@ -217,8 +218,15 @@ def ast_prov(
bytestring=bytestring,
annotations=annotations)

if lhs is not None and lhs.is_tmp:
# Currently def-use info does not properly account for assignments
# to variables that are part of a struct or array variable, so these
# assignments must be explicitly forced to appear in the lifting
if (
xd.is_vmem_unknown
or hl_lhs.offset.is_index_offset
or hl_lhs.offset.is_field_offset):
astree.add_expose_instruction(hl_assign.instrid)

astree.add_instr_mapping(hl_assign, ll_assign)
astree.add_instr_address(hl_assign, [iaddr])
astree.add_expr_mapping(hl_rhs, ll_rhs)
Expand Down