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2 changes: 1 addition & 1 deletion test/IRGen/debug_fragment_merge.sil
Original file line number Diff line number Diff line change
Expand Up @@ -3,7 +3,7 @@
// Checking the below on 32 bit architectures would be cumbersome: each
// fragment is 32 bits long, which changes the number of checks as well as the
// arithmethic on the bounds of each fragment.
// UNSUPPORTED: OS=watchos
// REQUIRES: CPU=arm64 || CPU=x86_64 || CPU=arm64e

// CHECK-DAG: llvm.dbg.value{{.*}} metadata ![[VAR:[0-9]+]], metadata !DIExpression(DW_OP_LLVM_fragment, 192, 64){{.*}} !dbg ![[LOC1:[0-9]+]]
// CHECK-DAG: llvm.dbg.value{{.*}} metadata ![[VAR]], metadata !DIExpression(DW_OP_LLVM_fragment, 128, 64){{.*}} !dbg ![[LOC1]]
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2 changes: 1 addition & 1 deletion test/IRGen/debug_fragment_merge.swift
Original file line number Diff line number Diff line change
@@ -1,7 +1,7 @@
// RUN: %target-swift-frontend -disable-availability-checking -primary-file %s -emit-sil -O -g | %FileCheck %s --check-prefix CHECK-SIL
// RUN: %target-swift-frontend -disable-availability-checking -primary-file %s -emit-ir -disable-llvm-optzns -O -g | %FileCheck %s

// UNSUPPORTED: OS=watchos
// REQUIRES: CPU=arm64 || CPU=x86_64 || CPU=arm64e

protocol External {
func use(str: String);
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2 changes: 2 additions & 0 deletions test/IRGen/debug_scope_distinct.swift
Original file line number Diff line number Diff line change
Expand Up @@ -3,6 +3,8 @@
// RUN: %target-swiftc_driver -O -g -I %t -c %s -emit-ir -o - | %FileCheck %s
// RUN: %target-swiftc_driver -O -g -I %t -c %s -o /dev/null

// REQUIRES: CPU=arm64 || CPU=x86_64 || CPU=arm64e

// CHECK: define {{.*}} void @"$s4main1TV4move2byyAC13TangentVectorV_tF"
// CHECK-SAME: ptr {{.*}} %[[ARG_PTR:.*]],
//
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