Fix incorrect performance counter #140
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The issue occurs when the variable csr undergoes sign-extension. Specifically, the values of CSR_CYCLE and CSR_CYCLEH are assigned as 0xC00 and 0xC80 respectively. During the decoding immediate stage, these values are unintentionally sign-extended to 0xFFFFFC00 and 0xFFFFFC80. To mitigate this problem, a solution is only the last 12 bits of csr are considered, disregarding the sign extension. Solve: sysprog21#139
2011eric
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Jul 22, 2023
The issue occurs when the CSR undergoes sign-extension. Specifically, the values of CSR_CYCLE and CSR_CYCLEH are assigned as 0xC00 and 0xC80 respectively. During the decoding immediate stage, these values are unintentionally sign-extended to 0xFFFFFC00 and 0xFFFFFC80. To mitigate this problem, a solution is only the last 12 bits of CSR are considered, disregarding the sign extension. Close sysprog21#139
vestata
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Jan 24, 2025
The issue occurs when the CSR undergoes sign-extension. Specifically, the values of CSR_CYCLE and CSR_CYCLEH are assigned as 0xC00 and 0xC80 respectively. During the decoding immediate stage, these values are unintentionally sign-extended to 0xFFFFFC00 and 0xFFFFFC80. To mitigate this problem, a solution is only the last 12 bits of CSR are considered, disregarding the sign extension. Close sysprog21#139
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The issue occurs when the variable csr undergoes sign-extension. Specifically, the values of CSR_CYCLE and CSR_CYCLEH are assigned as 0xC00 and 0xC80 respectively. During the decoding immediate stage, these values are unintentionally sign-extended to 0xFFFFFC00 and 0xFFFFFC80. To mitigate this problem, a solution is only the last 12 bits of csr are considered, disregarding the sign extension.
Solve: #139