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ASoC: SOF: dai-intel: add SOF_DAI_INTEL_SSP_CLKCTRL_MCLK/BCLK_ES bits #2936

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ASoC: SOF: dai-intel: add SOF_DAI_INTEL_SSP_CLKCTRL_MCLK/BCLK_ES bits #2936

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@bardliao bardliao commented May 21, 2021 •
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ASoC: SOF: dai-intel: add SOF_DAI_INTEL_SSP_CLKCTRL_MCLK/BCLK_ES bits

Add two clks_control bits. MCLK and/or BCLK will start during hw_params
and stop during hw_free if the corresponding bit is set.

@bardliao bardliao mentioned this pull request May 21, 2021
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kv2019i
kv2019i requested changes May 21, 2021
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This needs a ABI MINOR bump and needs to got through ABI process.

include/uapi/sound/sof/abi.h Outdated
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NAK on this. This is an addition to the ABI so needs to bump MINOR version.

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NAK on this. This is an addition to the ABI so needs to bump MINOR version.

@kv2019i Thanks for the reminder, I will change it to MINOR version.

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bardliao commented May 21, 2021

This needs a ABI MINOR bump and needs to got through ABI process.

Done, thanks.

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I don't think we need a new token @bardliao, we already have a clk_control field in this structure.

linux/include/sound/sof/dai-intel.h

Line 80 in dcea805

uint32_t clks_control;

we added a 'Keep Alive' for Bclk and mclk, which IIRC meant 'remain active at all times from the moment the firmware boots'. We could add two fields for early_start for both MCLK and BCLK, and there would be no ABI change required.

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bardliao commented May 25, 2021

I don't think we need a new token @bardliao, we already have a clk_control field in this structure.

linux/include/sound/sof/dai-intel.h

Line 80 in dcea805

uint32_t clks_control;

we added a 'Keep Alive' for Bclk and mclk, which IIRC meant 'remain active at all times from the moment the firmware boots'. We could add two fields for early_start for both MCLK and BCLK, and there would be no ABI change required.

Thanks @plbossart I will do it.

@bardliao
ASoC: SOF: dai-intel: add SOF_DAI_INTEL_SSP_CLKCTRL_MCLK/BCLK_ES bits
5fee75b 
Add two clks_control bits. MCLK and/or BCLK will start during hw_params
and stop during hw_free if the corresponding bit is set.

Signed-off-by: Bard Liao <yung-chuan.liao@linux.intel.com>
@bardliao bardliao changed the title ASoC: SOF: add SOF_TKN_INTEL_SSP_CLK_EARLY_START token ASoC: SOF: dai-intel: add SOF_DAI_INTEL_SSP_CLKCTRL_MCLK/BCLK_ES bits May 25, 2021
kv2019i
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Hmm, @plbossart and @bardliao .. even if we are using existing fields, taking new bits into use is still extending the interface, so I think this should follow the ABI process. We need sof/src/include/ipc/dai-intel.h change and a bump in ABI.

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plbossart commented May 26, 2021

Hmm, @plbossart and @bardliao .. even if we are using existing fields, taking new bits into use is still extending the interface, so I think this should follow the ABI process. We need sof/src/include/ipc/dai-intel.h change and a bump in ABI.

Agree. let's wait a bit as well to see if we only provide support for BCLK and MCLK, there's an open as to whether FSYNC can be controlled separately.

@plbossart plbossart mentioned this pull request Jun 3, 2021
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plbossart commented Jun 7, 2021

let's continue the work with #2965

@plbossart plbossart closed this Jun 7, 2021
plbossart pushed a commit that referenced this pull request Jun 7, 2021
@rleon @jgunthorpe
RDMA/rxe: Return CQE error if invalid lkey was supplied
dc07628 
RXE is missing update of WQE status in LOCAL_WRITE failures.  This caused
the following kernel panic if someone sent an atomic operation with an
explicitly wrong lkey.

[leonro@vm ~]$ mkt test
test_atomic_invalid_lkey (tests.test_atomic.AtomicTest) ...
 WARNING: CPU: 5 PID: 263 at drivers/infiniband/sw/rxe/rxe_comp.c:740 rxe_completer+0x1a6d/0x2e30 [rdma_rxe]
 Modules linked in: crc32_generic rdma_rxe ip6_udp_tunnel udp_tunnel rdma_ucm rdma_cm ib_umad ib_ipoib iw_cm ib_cm mlx5_ib ib_uverbs ib_core mlx5_core ptp pps_core
 CPU: 5 PID: 263 Comm: python3 Not tainted 5.13.0-rc1+ #2936
 Hardware name: QEMU Standard PC (Q35 + ICH9, 2009), BIOS rel-1.13.0-0-gf21b5a4aeb02-prebuilt.qemu.org 04/01/2014
 RIP: 0010:rxe_completer+0x1a6d/0x2e30 [rdma_rxe]
 Code: 03 0f 8e 65 0e 00 00 3b 93 10 06 00 00 0f 84 82 0a 00 00 4c 89 ff 4c 89 44 24 38 e8 2d 74 a9 e1 4c 8b 44 24 38 e9 1c f5 ff ff <0f> 0b e9 0c e8 ff ff b8 05 00 00 00 41 bf 05 00 00 00 e9 ab e7 ff
 RSP: 0018:ffff8880158af090 EFLAGS: 00010246
 RAX: 0000000000000000 RBX: ffff888016a78000 RCX: ffffffffa0cf1652
 RDX: 1ffff9200004b442 RSI: 0000000000000004 RDI: ffffc9000025a210
 RBP: dffffc0000000000 R08: 00000000ffffffea R09: ffff88801617740b
 R10: ffffed1002c2ee81 R11: 0000000000000007 R12: ffff88800f3b63e8
 R13: ffff888016a78008 R14: ffffc9000025a180 R15: 000000000000000c
 FS:  00007f88b622a740(0000) GS:ffff88806d540000(0000) knlGS:0000000000000000
 CS:  0010 DS: 0000 ES: 0000 CR0: 0000000080050033
 CR2: 00007f88b5a1fa10 CR3: 000000000d848004 CR4: 0000000000370ea0
 DR0: 0000000000000000 DR1: 0000000000000000 DR2: 0000000000000000
 DR3: 0000000000000000 DR6: 00000000fffe0ff0 DR7: 0000000000000400
 Call Trace:
  rxe_do_task+0x130/0x230 [rdma_rxe]
  rxe_rcv+0xb11/0x1df0 [rdma_rxe]
  rxe_loopback+0x157/0x1e0 [rdma_rxe]
  rxe_responder+0x5532/0x7620 [rdma_rxe]
  rxe_do_task+0x130/0x230 [rdma_rxe]
  rxe_rcv+0x9c8/0x1df0 [rdma_rxe]
  rxe_loopback+0x157/0x1e0 [rdma_rxe]
  rxe_requester+0x1efd/0x58c0 [rdma_rxe]
  rxe_do_task+0x130/0x230 [rdma_rxe]
  rxe_post_send+0x998/0x1860 [rdma_rxe]
  ib_uverbs_post_send+0xd5f/0x1220 [ib_uverbs]
  ib_uverbs_write+0x847/0xc80 [ib_uverbs]
  vfs_write+0x1c5/0x840
  ksys_write+0x176/0x1d0
  do_syscall_64+0x3f/0x80
  entry_SYSCALL_64_after_hwframe+0x44/0xae

Fixes: 8700e3e ("Soft RoCE driver")
Link: https://lore.kernel.org/r/11e7b553f3a6f5371c6bb3f57c494bb52b88af99.1620711734.git.leonro@nvidia.com
Signed-off-by: Leon Romanovsky <leonro@nvidia.com>
Acked-by: Zhu Yanjun <zyjzyj2000@gmail.com>
Signed-off-by: Jason Gunthorpe <jgg@nvidia.com>
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@bardliao @plbossart @RanderWang @kv2019i