@@ -136,6 +136,11 @@ static int ssp_hw_params(struct dai *dai)
136136
137137 spin_lock (& dai -> lock );
138138
139+ /* enable TRSE/RSRE before SSE */
140+ ssp_update_bits (dai , SSCR1 ,
141+ SSCR1_TSRE | SSCR1_RSRE ,
142+ SSCR1_TSRE | SSCR1_RSRE );
143+
139144 /* enable port */
140145 ssp_update_bits (dai , SSCR0 , SSCR0_SSE , SSCR0_SSE );
141146 trace_ssp ("ssp_hw_params(), SSP%d port enabled" , dai -> index );
@@ -160,6 +165,11 @@ static int ssp_hw_free(struct dai *dai)
160165 /* disable SSP port if no users */
161166 if (ssp -> state [SOF_IPC_STREAM_CAPTURE ] != COMP_STATE_ACTIVE &&
162167 ssp -> state [SOF_IPC_STREAM_PLAYBACK ] != COMP_STATE_ACTIVE ) {
168+ /* clear TRSE/RSRE before SSE */
169+ ssp_update_bits (dai , SSCR1 ,
170+ SSCR1_TSRE | SSCR1_RSRE ,
171+ 0 );
172+
163173 ssp_update_bits (dai , SSCR0 , SSCR0_SSE , 0 );
164174 ssp -> state [SOF_IPC_STREAM_CAPTURE ] = COMP_STATE_PREPARE ;
165175 ssp -> state [SOF_IPC_STREAM_PLAYBACK ] = COMP_STATE_PREPARE ;
@@ -798,6 +808,11 @@ static void ssp_start(struct dai *dai, int direction)
798808
799809 if (!(ssp -> params .clks_control &
800810 SOF_DAI_INTEL_SSP_CLKCTRL_BCLK_ES )) {
811+ /* enable TRSE/RSRE before SSE */
812+ ssp_update_bits (dai , SSCR1 ,
813+ SSCR1_TSRE | SSCR1_RSRE ,
814+ SSCR1_TSRE | SSCR1_RSRE );
815+
801816 /* enable port */
802817 ssp_update_bits (dai , SSCR0 , SSCR0_SSE , SSCR0_SSE );
803818 trace_ssp ("ssp_start(), SSP%d port enabled" , dai -> index );
@@ -809,10 +824,8 @@ static void ssp_start(struct dai *dai, int direction)
809824
810825 /* enable DMA */
811826 if (direction == DAI_DIR_PLAYBACK ) {
812- ssp_update_bits (dai , SSCR1 , SSCR1_TSRE , SSCR1_TSRE );
813827 ssp_update_bits (dai , SSTSA , 0x1 << 8 , 0x1 << 8 );
814828 } else {
815- ssp_update_bits (dai , SSCR1 , SSCR1_RSRE , SSCR1_RSRE );
816829 ssp_update_bits (dai , SSRSA , 0x1 << 8 , 0x1 << 8 );
817830 }
818831
@@ -858,6 +871,11 @@ static void ssp_stop(struct dai *dai, int direction)
858871 /* disable SSP port if no users */
859872 if (ssp -> state [SOF_IPC_STREAM_CAPTURE ] != COMP_STATE_ACTIVE &&
860873 ssp -> state [SOF_IPC_STREAM_PLAYBACK ] != COMP_STATE_ACTIVE ) {
874+ /* clear TRSE/RSRE before SSE */
875+ ssp_update_bits (dai , SSCR1 ,
876+ SSCR1_TSRE | SSCR1_RSRE ,
877+ 0 );
878+
861879 ssp_update_bits (dai , SSCR0 , SSCR0_SSE , 0 );
862880 ssp -> state [SOF_IPC_STREAM_CAPTURE ] = COMP_STATE_PREPARE ;
863881 ssp -> state [SOF_IPC_STREAM_PLAYBACK ] = COMP_STATE_PREPARE ;
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