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[BUG] Buffer must be in L2 address space #7714

@plbossart

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@plbossart

result/planresultdetail/26668?model=TGLU_RVP_SDW_IPC4ZPH&testcase=multiple-pipeline-all-25

ASSERTION FAIL [aligned_addr >= (3187671040) && aligned_addr < (3187671040) + (1966080)] @ /srv/home/jenkins/workspace/sof_generic_build/zephyr/soc/xtensa/intel_adsp/common/include/intel_adsp_hda.h:166
Buffer must be in L2 address space
[ 50.060696] os: ** FATAL EXCEPTION
[ 50.060706] os: ** CPU 0 EXCCAUSE 63 (zephyr exception)
[ 50.060716] os: ** PC 0xbe052dbf VADDR (nil)
[ 50.060723] os: ** PS 0x60e20
[ 50.060736] os: ** (INTLEVEL:0 EXCM: 0 UM:1 RING:0 WOE:1 OWB:14 CALLINC:2)
[ 50.060746] os: ** A0 0xbe015028 SP 0xbe0a54d0 A2 0x4 A3 0xbe0a54e0
[ 50.060756] os: ** A4 0xbe0a54c0 A5 0x4 A6 0x30 A7 (nil)
[ 50.060766] os: ** A8 0xbe013531 A9 0xbe0a5440 A10 0xbe0762a8 A11 0xbe0a54e0
[ 50.060776] os: ** A12 0xbe0a54c0 A13 0x4 A14 0x1 A15 0x1
[ 50.060786] os: ** LBEG 0xbe016599 LEND 0xbe0165a8 LCOUNT 0xbe016e25
[ 50.060795] os: ** SAR 0x20

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    IPC4Issues observed with IPC4 (same IPC as Windows)P2Critical bugs or normal featuresTGLApplies to Tiger LakebugSomething isn't working as expected

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