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Miscellaneous fixes for dynamic pipelines and multicore #4390
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lgirdwood
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Might be worth splitting the PR as some fixes can be merged today.
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@ranj063 does this make the combination of dynamic pipelines + multicore work, or are additional fixes needed? Most of the fixes are beyond my understanding but I can offer validation help later this week. |
@plbossart no it doesn't. just not yet. I have 20 out of 24 tests failing with dynamic pipelines + multicore. This bring it down to 10 failures :D. I have more fixes coming in the FW along with kernel changes |
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SOFCI TEST |
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@lgirdwood how should I address unit test falure. pipeline_free is no longer associated with widget free. Should I just remove the test? |
Check and return error if enabling a core fails instead of overwriting the error with a subsequent successful core power up. Signed-off-by: Ranjani Sridharan <ranjani.sridharan@linux.intel.com>
edf_sh->list is not an item. So calling list_itel_del() on it is wrong in scheduler_free_edf(). remove list_init() from scheduler_free_edf() as the list should already be free and initialized. Signed-off-by: Ranjani Sridharan <ranjani.sridharan@linux.intel.com>
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@ranj063 btw, this fixed most of my valgrind warning on testbench when we free components and pipeline. I've went down from ~50 to 5 errors now. I'm looking at the following now. |
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@ranj063 update, I've fixed above and got it down to some leaks now, these might all be in testbench. |
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@lgirdwood I've updated the PR with the unit test failure update and a couple more fixes to make buffer and pipeline shared along with checking if the core is enabled before scheduling the DAI config IDC |
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this could fix the IDC timeout in #4382 |
…ree() Pipeline components will be freed by the host before the pipeline widget itself is freed. No need to walk the pipeline and free anything during pipeline_free(). Fix the unit tests to remove the tests that are not relevant anymore. Signed-off-by: Ranjani Sridharan <ranjani.sridharan@linux.intel.com>
When a secondary core is disabled and re-enabled without a D3 cycle, the POWER_UP IDC message end up reading the trace point message from the first boot. Reset it during power down to avoid this. Suggested-by: Guennadi Liakhovetski <guennadi.liakhovetski@linux.intel.com> Signed-off-by: Ranjani Sridharan <ranjani.sridharan@linux.intel.com>
Make them shared between cores as they can be shared with other pipelines, trace and possibly even DMA. Signed-off-by: Ranjani Sridharan <ranjani.sridharan@linux.intel.com>
DAI config IPC is propagated to all DAI comps scheduled on all cores but it should only be done if the secondary core is enabled. Signed-off-by: Ranjani Sridharan <ranjani.sridharan@linux.intel.com>
This fixes a few issues with multi-core and dynamic pipelines. Still got a few more to tackle.