audio: volume: optimize volume component with HIFI3 #5169
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aiChaoSONG
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wouldn't it be easier to create two additional files for the new optimisation options and link one of them in CMakeLists.txt?
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Good work! Some comments:
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@andrula-song if you have fixed comments please mark them as resolved |
aiChaoSONG
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singalsu
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becuse there is still a failed case about check-alsabat-headset-playback.sh on ADLP_RVP_NOCODEC device, I am trying to fix it and may need many submission， so i will creat a new draft to test it. |
Please use the same PR and just force push your updates. This keeps the history and context for your changes. |
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@lgirdwood It seems like this commit passed all sof-ci test cases except heck-suspend-resume-with-playback-5.sh(other PRs also failed this case). But there is still tgl failed cases of Internal Intel CI System/merge/build, if these are unrelated cases, maybe the latest commit is ready for review. |
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@andrula-song there is an issues with CI that @kkarask is fixing. We should be able to retest later today. |
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@kkarask can you provid wav file of failed cases in Internal Intel CI System/merge/build? |
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hi @lgirdwood , |
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Looks very good, minor things to change!
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@andrula-song looks like we are almost done, but we do need that alignment API as I would imagine other will be doing the same thing. @singalsu any comment ?
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Just need to remove the alignment check and we are good.
Processing continuous data. Asking a 8-byte aligned memory to store volume gain 4 times, using 2-way or 4-way pipeline operations of xtensa intrinsics. This method can reduce about 40% MCPS than the original one. Signed-off-by: Andrula Song <xiaoyuan.song@intel.com>
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There are 2 methods to optimize volume component in HiFi3
1.Method 1 : Processing data per channel instead of per sample. Skipping address reading and
writing, only load volume gain once for one channel. This method can
reduce about 20% MCPS than the original one
to store volume gain 4 times, using 2-way or 4-way pipeline operations
of xtensa intrinsics. This method can reduce about 40% MCPS than the
original one.
Signed-off-by: Andurla Song xiaoyuan.song@intel.com