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@ranj063 ranj063 commented Apr 3, 2023

Add the SSP blob version and set it based on the platform.

This is a replacement for #7060

Fixes: #6837

@ranj063 ranj063 requested a review from jsarha as a code owner April 3, 2023 20:38
@ranj063 ranj063 force-pushed the fix/ssp_link_clock branch 2 times, most recently from bbe4716 to 3772582 Compare April 3, 2023 21:24
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Changes look good and simpler than #7060.

the word version maybe too general, I think blob_version maybe better, but no big deal.

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@juimonen can you remind us if the AUX TLV is part of the SSP blob 1.00 or 1.05? I wonder why would need to maintain a difference here.

Why not use 1.05 always?

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@plbossart I think blob version 1.00 for TGL/ADL is what makes it possible for the alsatplg compiler to ignore the aux parameters that include the link clock_source

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Only MTL newer platforms support aux. If you send a v1.05 blob to cAVS2.5 SOF SW, you'll get errors.

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@kv2019i I don't think that's true any longer with the change suggested by @ranj063 to make zephyr deal with aux in all cases, and do nothing for TGL.

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@ranj063 ranj063 Apr 5, 2023

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@plbossart if we always used blob version 1.05, the problem is that the ipc tester firmware might fail.

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I think the SSP blob 1.05 was added before TGL. @mmaka1 @mwasko can you please confirm?

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Not entirely sure how well this aligns with #7370 , but put these two together seems to be a clean solution. Approving at least this one.

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Only MTL newer platforms support aux. If you send a v1.05 blob to cAVS2.5 SOF SW, you'll get errors.

Add the SSP blob version and set it based on the platform.

Co-developed-by: Jaska Uimonen <jaska.uimonen@intel.com>
Signed-off-by: Jaska Uimonen <jaska.uimonen@intel.com>
Signed-off-by: Ranjani Sridharan <ranjani.sridharan@linux.intel.com>
Move and rename the hw_config class to
platform/intel/hw_config_cardinal_clk.conf.
This hw_config is specific to Intel SSP DAI that use the cardinal clock
for the mclk frequency.

Ideally, this class should have immutable mclk_frequency and link clock
source. But because the alsatplg compiler expects the name of the hw
config class to be "hw_config" without any extensions, it is left as
modifiable for now. Once the topology compiler is modified, this will be
made immutable in a follow up PR.

Also, introduce a new hw_config_simple.conf file that contains the
hw_config definition for the HDA/DMIC/SDW type DAIs with only the ID and
name attributes.

Signed-off-by: Ranjani Sridharan <ranjani.sridharan@linux.intel.com>
@ranj063 ranj063 force-pushed the fix/ssp_link_clock branch from 0fe1a5d to 88fc764 Compare April 5, 2023 18:01
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ranj063 commented Apr 5, 2023

@plbossart @kv2019i @lgirdwood I got to the root of the problem:

  1. There's a strict restriction wrt the alsatplg compiler which requires the "Object.Base.link_config.1" to be defined right within the Object.Base.hw_config.N{} node. This is wrong and should be fixed in the compiler so that the Object definition in hw_config_cardinal_clock.conf will work as expected.
  2. blob version 0x100 is required for TGL with the above change so that the clock_source setting will be ignored.
  3. Alternatively, if we set 0x105 for TGL, we need the zephyr patch drivers: ssp: Ignore link clock_source for non-ACE platforms zephyrproject-rtos/zephyr#56497

In conclusion, I think this is what we should do. Merge this PR so that we can unblock the alsabat tests in CI. Then work on fixing the alsatplg to allow link_config to come from the class definition instead of the object instance. Finally after the zephyr patch is merged, set the blob type to 0x105 for all platforms.

Let me know what you think.

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One comment inline about BT loopback topologies. Otherwise this looks like a clean approach.

tx_slots 3
rx_slots 0
Object.Base.link_config.1 {
clock_source 0
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Should this be the cardinal clock (i.e. "1"), so we can use integer divider for 1.536Mhz?
UPDATE: no, this is ok, clouc source 0 is 38Mhz, so this is ok.

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no should 0 for xtal as xtal is 38.4 and 38.4M/1.536M = 25

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@kv2019i @ranj063 if the BT frequencies are 256kHz, 1536kHz then we could use either xtal or audio cardinal clocks.
It's only for the 2.4MHz case that we would have a problem, but it's not used.

I am now wondering if we actually have a case where the audio cardinal clock does not work?

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@kv2019i I will let you answer this question and follow up with another PR if we need to change the clock source for BT. For now, it actually makes no difference since we dont build the topology for MTL

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fredoh9 commented Apr 5, 2023

I check this PR with MTL nocodec device, it generates solid waveform, alsabat test consistently passes!

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See comment below, with the existing BT configurations should we always set the link source to the audio cardinal clock?

tx_slots 3
rx_slots 0
Object.Base.link_config.1 {
clock_source 0
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@kv2019i @ranj063 if the BT frequencies are 256kHz, 1536kHz then we could use either xtal or audio cardinal clocks.
It's only for the 2.4MHz case that we would have a problem, but it's not used.

I am now wondering if we actually have a case where the audio cardinal clock does not work?

@ranj063 ranj063 merged commit 650423f into thesofproject:main Apr 5, 2023
@ranj063 ranj063 deleted the fix/ssp_link_clock branch April 5, 2023 20:32
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[BUG] distortion during playback on MTL-NOCODEC

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