[DRAFT] Revert/pr7857 pr7325 test

app/boards/intel_adsp_ace15_mtpm.conf

@@ -14,15 +14,12 @@ CONFIG_COMP_SRC_IPC4_FULL_MATRIX=y
 CONFIG_PM=y
 CONFIG_PM_DEVICE=y
 CONFIG_PM_DEVICE_RUNTIME=y
-CONFIG_PM_DEVICE_RUNTIME_EXCLUSIVE=n
 CONFIG_PM_DEVICE_POWER_DOMAIN=y
 CONFIG_PM_POLICY_CUSTOM=y
 
 CONFIG_POWER_DOMAIN=y
 CONFIG_POWER_DOMAIN_INTEL_ADSP=y
 
-CONFIG_ADSP_IMR_CONTEXT_SAVE=y
-
 # enable Zephyr drivers
 CONFIG_ZEPHYR_NATIVE_DRIVERS=y
 CONFIG_DAI=y

src/include/sof/ipc/common.h

@@ -155,20 +155,6 @@ int ipc_dai_data_config(struct dai_data *dd, struct comp_dev *dev);
  */
 void ipc_boot_complete_msg(struct ipc_cmd_hdr *header, uint32_t data);
 
-#if defined(CONFIG_PM_DEVICE) && defined(CONFIG_INTEL_ADSP_IPC)
-/**
- * @brief Send an IPC response to Host power transition request informing
- * that power transition failed.
- * @note Normally an reply to the Host IPC message is performed in the
- * low level assembly code to make sure DSP completed all operations before
- * power cut-off.
- * However, when power transition fails for some reason, we should send the
- * IPC response informing about the failure.
- * This happens in abnormal circumstances since the response is send not during
- * IPC task but during power transition logic in the Idle thread.
- */
-void ipc_send_failed_power_transition_response(void);
-#endif /* CONFIG_PM_DEVICE && CONFIG_INTEL_ADSP_IPC */
 /**
  * \brief Send a IPC notification that FW has hit
  *        a DSP notification.

src/ipc/ipc-zephyr.c

@@ -17,15 +17,11 @@
 #include <sof/ipc/schedule.h>
 #include <sof/lib/mailbox.h>
 #include <sof/lib/memory.h>
-#if defined(CONFIG_PM)
+#if defined(CONFIG_PM_POLICY_CUSTOM)
 #include <sof/lib/cpu.h>
-#include <zephyr/pm/device.h>
-#include <zephyr/pm/state.h>
-#include <zephyr/irq.h>
-#include <zephyr/pm/policy.h>
 #else
 #include <sof/lib/pm_runtime.h>
-#endif /* CONFIG_PM */
+#endif
 #include <sof/lib/uuid.h>
 #include <rtos/wait.h>
 #include <sof/list.h>
@@ -44,8 +40,6 @@
 DECLARE_SOF_UUID("ipc-task", ipc_task_uuid, 0x8fa1d42f, 0xbc6f, 0x464b,
 		 0x86, 0x7f, 0x54, 0x7a, 0xf0, 0x88, 0x34, 0xda);
 
-LOG_MODULE_DECLARE(ipc, CONFIG_SOF_LOG_LEVEL);
-
 /**
  * @brief Private data for IPC.
  *
@@ -85,69 +79,6 @@ static bool message_handler(const struct device *dev, void *arg, uint32_t data,
 	return false;
 }
 
-#ifdef CONFIG_PM_DEVICE
-/**
- * @brief IPC device suspend handler callback function.
- * Checks whether device power state should be actually changed.
- *
- * @param dev IPC device.
- * @param arg IPC struct pointer.
- */
-static int ipc_device_suspend_handler(const struct device *dev, void *arg)
-{
-	struct ipc *ipc = (struct ipc *)arg;
-
-	int ret = 0;
-
-	if (!(ipc->task_mask & IPC_TASK_POWERDOWN)) {
-		tr_err(&ipc_tr,
-		       "ipc task mask not set to IPC_TASK_POWERDOWN. Current value: %u",
-		       ipc->task_mask);
-		ret = -ENOMSG;
-	}
-
-	if (!ipc->pm_prepare_D3) {
-		tr_err(&ipc_tr, "power state D3 not requested");
-		ret = -EBADMSG;
-	}
-
-	if (!list_is_empty(&ipc->msg_list)) {
-		tr_err(&ipc_tr, "there are queued IPC messages to be sent");
-		ret = -EINPROGRESS;
-	}
-
-	if (ret != 0)
-		ipc_send_failed_power_transition_response();
-
-	return ret;
-}
-
-/**
- * @brief IPC device resume handler callback function.
- * Resets IPC control after context restore.
- *
- * @param dev IPC device.
- * @param arg IPC struct pointer.
- */
-static int ipc_device_resume_handler(const struct device *dev, void *arg)
-{
-	struct ipc *ipc = (struct ipc *)arg;
-
-	ipc_set_drvdata(ipc, NULL);
-	ipc->task_mask = 0;
-	ipc->pm_prepare_D3 = false;
-
-	/* attach handlers */
-	intel_adsp_ipc_set_message_handler(INTEL_ADSP_IPC_HOST_DEV, message_handler, ipc);
-
-	/* schedule task */
-	schedule_task_init_edf(&ipc->ipc_task, SOF_UUID(ipc_task_uuid),
-			       &ipc_task_ops, ipc, 0, 0);
-
-	return 0;
-}
-#endif /* CONFIG_PM_DEVICE */
-
 #if CONFIG_DEBUG_IPC_COUNTERS
 
 static inline void increment_ipc_received_counter(void)
@@ -199,7 +130,7 @@ enum task_state ipc_platform_do_cmd(struct ipc *ipc)
 
 	if (ipc->task_mask & IPC_TASK_POWERDOWN ||
 	    ipc_get()->pm_prepare_D3) {
-#if defined(CONFIG_PM)
+#if defined(CONFIG_PM_POLICY_CUSTOM)
 		/**
 		 * @note For primary core this function
 		 * will only force set lower power state
@@ -214,7 +145,7 @@ enum task_state ipc_platform_do_cmd(struct ipc *ipc)
 		 * powered off and IPC sent.
 		 */
 		platform_pm_runtime_power_off();
-#endif /* CONFIG_PM  */
+#endif /* CONFIG_PM_POLICY_CUSTOM  */
 	}
 
 	return SOF_TASK_STATE_COMPLETED;
@@ -238,7 +169,11 @@ int ipc_platform_send_msg(const struct ipc_msg *msg)
 	/* prepare the message and copy to mailbox */
 	struct ipc_cmd_hdr *hdr = ipc_prepare_to_send(msg);
 
-	return intel_adsp_ipc_send_message(INTEL_ADSP_IPC_HOST_DEV, hdr->pri, hdr->ext);
+	if (!intel_adsp_ipc_send_message(INTEL_ADSP_IPC_HOST_DEV, hdr->pri, hdr->ext))
+		/* IPC device is busy with something else */
+		return -EBUSY;
+
+	return 0;
 }
 
 void ipc_platform_send_msg_direct(const struct ipc_msg *msg)
@@ -266,12 +201,6 @@ int platform_ipc_init(struct ipc *ipc)
 
 	/* attach handlers */
 	intel_adsp_ipc_set_message_handler(INTEL_ADSP_IPC_HOST_DEV, message_handler, ipc);
-#ifdef CONFIG_PM
-	intel_adsp_ipc_set_suspend_handler(INTEL_ADSP_IPC_HOST_DEV,
-					   ipc_device_suspend_handler, ipc);
-	intel_adsp_ipc_set_resume_handler(INTEL_ADSP_IPC_HOST_DEV,
-					  ipc_device_resume_handler, ipc);
-#endif
 
 	return 0;
 }

src/ipc/ipc4/handler.c

@@ -1068,24 +1068,6 @@ void ipc_boot_complete_msg(struct ipc_cmd_hdr *header, uint32_t data)
 	header->ext = 0;
 }
 
-#if defined(CONFIG_PM_DEVICE) && defined(CONFIG_INTEL_ADSP_IPC)
-void ipc_send_failed_power_transition_response(void)
-{
-	struct ipc4_message_request *request = ipc_from_hdr(&msg_data.msg_in);
-	struct ipc4_message_reply response;
-
-	response.primary.r.status = IPC4_POWER_TRANSITION_FAILED;
-	response.primary.r.rsp = SOF_IPC4_MESSAGE_DIR_MSG_REPLY;
-	response.primary.r.msg_tgt = request->primary.r.msg_tgt;
-	response.primary.r.type = request->primary.r.type;
-
-	msg_reply.header = response.primary.dat;
-	list_init(&msg_reply.list);
-
-	ipc_msg_send_direct(&msg_reply, NULL);
-}
-#endif /* defined(CONFIG_PM_DEVICE) && defined(CONFIG_INTEL_ADSP_IPC) */
-
 void ipc_send_panic_notification(void)
 {
 	msg_notify.header = SOF_IPC4_NOTIF_HEADER(SOF_IPC4_EXCEPTION_CAUGHT);

src/platform/intel/ace/platform.c

@@ -76,7 +76,7 @@ int platform_boot_complete(uint32_t boot_message)
 }
 
 static struct pm_notifier pm_state_notifier = {
-	.state_entry = cpu_notify_state_entry,
+	.state_entry = NULL,
 	.state_exit = cpu_notify_state_exit,
 };
 

west.yml

@@ -45,7 +45,7 @@ manifest:
 
     - name: zephyr
       repo-path: zephyr
-      revision: 23b3cae1b1d91cd064d31cdeb78e3a6127b5051d
+      revision: e2e3dc0771188f2a01e3aaa792f81e6c6a611eb6
       remote: zephyrproject
 
       # Import some projects listed in zephyr/west.yml@revision

zephyr/include/sof/lib/cpu.h

@@ -26,8 +26,6 @@
 
 #include <zephyr/pm/pm.h>
 
-void cpu_notify_state_entry(enum pm_state state);
-
 void cpu_notify_state_exit(enum pm_state state);
 
 #endif /* CONFIG_PM */

zephyr/lib/cpu.c

@@ -13,14 +13,10 @@
 #include <sof/init.h>
 #include <sof/lib/cpu.h>
 #include <sof/lib/pm_runtime.h>
-#include <ipc/topology.h>
-#include <rtos/alloc.h>
 
 /* Zephyr includes */
 #include <version.h>
 #include <zephyr/kernel.h>
-#include <zephyr/device.h>
-#include <zephyr/drivers/mm/mm_drv_intel_adsp_mtl_tlb.h>
 
 #if CONFIG_MULTICORE && CONFIG_SMP
 
@@ -68,42 +64,6 @@ LOG_MODULE_DECLARE(zephyr, CONFIG_SOF_LOG_LEVEL);
 
 extern struct tr_ctx zephyr_tr;
 
-/* address where zephyr PM will save memory during D3 transition */
-#ifdef CONFIG_ADSP_IMR_CONTEXT_SAVE
-extern void *global_imr_ram_storage;
-#endif
-
-void cpu_notify_state_entry(enum pm_state state)
-{
-	if (!cpu_is_primary(arch_proc_id()))
-		return;
-
-	if (state == PM_STATE_SOFT_OFF) {
-#ifdef CONFIG_ADSP_IMR_CONTEXT_SAVE
-		size_t storage_buffer_size;
-
-		/* allocate IMR global_imr_ram_storage */
-		const struct device *tlb_dev = DEVICE_DT_GET(DT_NODELABEL(tlb));
-
-		__ASSERT_NO_MSG(tlb_dev);
-		const struct intel_adsp_tlb_api *tlb_api =
-				(struct intel_adsp_tlb_api *)tlb_dev->api;
-
-		/* get HPSRAM storage buffer size */
-		storage_buffer_size = tlb_api->get_storage_size();
-
-		/* add space for LPSRAM */
-		storage_buffer_size += LP_SRAM_SIZE;
-
-		/* allocate IMR buffer and store it in the global pointer */
-		global_imr_ram_storage = rmalloc(SOF_MEM_ZONE_SYS_RUNTIME,
-						 0,
-						 SOF_MEM_CAPS_L3,
-						 storage_buffer_size);
-#endif /* CONFIG_ADSP_IMR_CONTEXT_SAVE */
-	}
-}
-
 /* notifier called after every power state transition */
 void cpu_notify_state_exit(enum pm_state state)
 {
@@ -114,18 +74,8 @@ void cpu_notify_state_exit(enum pm_state state)
 			 * state and is back in the Idle thread.
 			 */
 			atomic_set(&ready_flag, 1);
-			return;
 		}
 #endif
-
-#ifdef CONFIG_ADSP_IMR_CONTEXT_SAVE
-		/* free global_imr_ram_storage */
-		rfree(global_imr_ram_storage);
-		global_imr_ram_storage = NULL;
-
-		/* send FW Ready message */
-		platform_boot_complete(0);
-#endif
 	}
 }