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app: boards: ace20_lnl: set DMA_INTEL_ADSP_HDA_TIMING_L1_EXIT=y #9194
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Set CONFIG_DMA_INTEL_ADSP_HDA_TIMING_L1_EXIT in board overlay as the Zephyr platform default is not correct in the current version of Zephyr. Link: thesofproject#9191 Signed-off-by: Kai Vehmanen <kai.vehmanen@linux.intel.com>
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Zephyr updates are currently blocked due to a interface change in upstream Zephyr (see #9189), so to fix the L1_EXIT setting before v2.10 branch point (and increase test coverage earlier), here's a PR to change the setting on SOF side. |
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Pause still failing but playback passed in LNL SDW https://sof-ci.01.org/sofpr/PR9194/build5077/devicetest/index.html Reproduction of bank switch timeout thesofproject/linux#4823 was always much higher on pause/resume so this result probably does not mean anything. LNL HDA was not available, will re-run later. cc: |
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SOFCI TEST |
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@lyakh can you check this new, unrelated, Zephyr main incompatibility? https://github.com/thesofproject/sof/actions/runs/9371200004/job/25799955329?pr=9194 Off topic sorry. |
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The "usual" LNL failures in https://sof-ci.01.org/sofpr/PR9194/build5081/devicetest/index.html |
@marc-hb known, dealt with |
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Unfortunately this change alone is not sufficient, the dmic/capture error with no data is still seen with this PR applied: https://sof-ci.01.org/sofpr/PR9194/build5081/devicetest/index.html?model=LNLM_RVP_HDA&testcase=check-pause-resume-capture-100 |
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Not needed as Zephyr baseline update already changed the default. |
Set CONFIG_DMA_INTEL_ADSP_HDA_TIMING_L1_EXIT in board overlay as the Zephyr platform default is not correct in the current version of Zephyr.
Link: #9191