Merge mesa-24.2.5

VERSION

@@ -1 +1 @@
-24.2.4
+24.2.5

docs/relnotes.rst

@@ -3,6 +3,7 @@ Release Notes
 
 The release notes summarize what's new or changed in each Mesa release.
 
+-  :doc:`24.2.5 release notes <relnotes/24.2.5>`
 -  :doc:`24.2.4 release notes <relnotes/24.2.4>`
 -  :doc:`24.2.3 release notes <relnotes/24.2.3>`
 -  :doc:`24.2.2 release notes <relnotes/24.2.2>`
@@ -430,6 +431,7 @@ The release notes summarize what's new or changed in each Mesa release.
    :maxdepth: 1
    :hidden:
 
+   24.2.5 <relnotes/24.2.5>
    24.2.4 <relnotes/24.2.4>
    24.2.3 <relnotes/24.2.3>
    24.2.2 <relnotes/24.2.2>

docs/relnotes/24.2.4.rst

@@ -19,7 +19,8 @@ SHA checksums
 
 ::
 
-    TBD.
+    SHA256: 5ea42a8bb6d58aec9754c9f553b1e413f67c09403741f8e2786c3f9e63d3461a  mesa-24.2.4.tar.xz
+    SHA512: f0f1c23591cce85966efaf3988afdb14b64ceb7216b3994e8fc50e8ddc62c35a84b2013285c84080d963aec2afb94dac345f5f00e7ccf9ae7e9ab3f5b9ba0bcb  mesa-24.2.4.tar.xz
 
 
 New features

docs/relnotes/24.2.5.rst

@@ -0,0 +1,173 @@
+Mesa 24.2.5 Release Notes / 2024-10-16
+======================================
+
+Mesa 24.2.5 is a bug fix release which fixes bugs found since the 24.2.4 release.
+
+Mesa 24.2.5 implements the OpenGL 4.6 API, but the version reported by
+glGetString(GL_VERSION) or glGetIntegerv(GL_MAJOR_VERSION) /
+glGetIntegerv(GL_MINOR_VERSION) depends on the particular driver being used.
+Some drivers don't support all the features required in OpenGL 4.6. OpenGL
+4.6 is **only** available if requested at context creation.
+Compatibility contexts may report a lower version depending on each driver.
+
+Mesa 24.2.5 implements the Vulkan 1.3 API, but the version reported by
+the apiVersion property of the VkPhysicalDeviceProperties struct
+depends on the particular driver being used.
+
+SHA checksums
+-------------
+
+::
+
+    TBD.
+
+
+New features
+------------
+
+- None
+
+
+Bug fixes
+---------
+
+- [radeonsi] glLinkProgram terminates the application when Shader is passing Bindless Texture into function
+- gallium: crash when using images obtained from a texture with a bindless handle
+- gallium: Crash when writing to writeonly image3D passed in via parameter
+- Using DXT1 textures fails in GL ES 1, even with EXT_texture_compression_dxt1 supported
+- r300 regression : Upside down and broken redering for Source games
+- intel A770 dg2 silent hill 2 doesn't run
+- Mesa's \`intel_hang_replay` tool fails to work
+- Mesa's \`intel_hang_replay` tool fails to work
+
+
+Changes
+-------
+
+Alessandro Astone (1):
+
+- panvk: Add missing headers to android platform
+
+Bas Nieuwenhuizen (1):
+
+- radv: Disable EXT BDA capture and replay.
+
+Carlos Santa (2):
+
+- intel/hang_replay: fix the typo in the ioctl call
+- intel/hang_replay: remove EXEC_OBJECT_WRITE
+
+Christian Gmeiner (1):
+
+- etnaviv: Improve split sampler check
+
+Danylo Piliaiev (1):
+
+- nir/opt_16b_tex_image: Sign extension should matter for texel buffer txf
+
+David Heidelberg (2):
+
+- amd: Pass addrlib cpp args to the tests
+- osmesa: Fix OSMesaGetDepthBuffer() test without depth
+
+David Rosca (2):
+
+- radeonsi/vcn: Fix out of bounds write when invalidating QP map regions
+- radeonsi/vcn: Fix out of bounds read in H264 decode
+
+Eric Engestrom (10):
+
+- docs: add sha sum for 24.2.4
+- .pick_status.json: Update to 1cbc316999af23b2dbe5f2fc0c057a9a26ae68b7
+- Revert "mesa: fix sample count handling for MSRTT"
+- .pick_status.json: Mark 894b37e06099c60f371e9b181e3f84cfc29c49bb as denominated
+- .pick_status.json: Update to 78b614b333b01ce0dfb9e4d9353a02a03fdcc154
+- .pick_status.json: Update to 336f80137d26230bd124f475bd4382a0c727004f
+- .pick_status.json: Update to e8e8c17a0c893a74bff58c2abbc0ee8c451db933
+- .pick_status.json: Update to 6d6d5b869c5a4afd7fb30c7a5b1def8fcc14d255
+- .pick_status.json: Update to 7b09fc98fb60becde7435b2303f7dd329937f6cb
+- .pick_status.json: Mark c747c1e1f4f48b543a8ed8f7f7db32e5393d41a0 as denominated
+
+Faith Ekstrand (1):
+
+- nvk: Advertise 64-bit atomics on buffer views
+
+Jordan Justen (1):
+
+- intel/dev: Add 0xb640 ARL PCI id
+
+Jose Maria Casanova Crespo (1):
+
+- v3d: initialize job local key with the 8 color buffer available in v7.1+
+
+Kenneth Graunke (5):
+
+- intel/brw: Delete Gfx7-8 code from emit_barrier()
+- intel/brw: Make a ubld temporary in emit_barrier()
+- intel/brw: Fix register and builder size in emit_barrier() for Xe2
+- intel/brw: Delete more Gfx8 code from brw_fs_combine_constants
+- intel/brw: Use whole 512-bit registers in constant combining on Xe2
+
+Lionel Landwerlin (2):
+
+- .pick_status.json: Update to c8c354d9c3a2e79230723f1c8b0571b20d034fee
+- isl: remove duplicated copy for tileX/TileY
+
+Lucas Stach (1):
+
+- etnaviv: re-emit uniforms on sampler view changes when txs is used
+
+Marek Olšák (3):
+
+- nir/opt_vectorize_io: fix stack buffer overflow with 16-bit output stores
+- gallium/u_threaded: fix crash in tc_create_image_handle due to resource == NULL
+- radeonsi: set the valid buffer range for bindless image buffers
+
+Maíra Canal (1):
+
+- v3d: Don't use performance counters names array with an older kernel
+
+Mike Blumenkrantz (2):
+
+- zink: fix external_only reporting for dmabuf formats
+- zink: block srgb with winsys imports
+
+Paulo Zanoni (2):
+
+- anv/trtt: set every entry to NULL when we create an L2 table
+- anv/trtt: fix error handling when adding binds
+
+Pavel Ondračka (1):
+
+- r300: remove gl_ClipVertex early
+
+Rob Clark (1):
+
+- freedreno: Balance out u_blitter cb0 save/restore
+
+Samuel Pitoiset (4):
+
+- radv: do not expose NV DGC extensions on GFX6-7
+- radv: fix conditional rendering with DGC preprocessing on compute
+- radv: fix returning non-zero captured address without binding
+- radv: use app names instead of exec name for shader based drirc workarounds
+
+Satadru Pramanik (1):
+
+- Update lp_bld_misc.cpp to support llvm-19+.
+
+Tapani Pälli (8):
+
+- intel/genxml: introduce L3 Fabric Flush for gfx12
+- intel/ds: add L3 fabric flush support
+- anv: add plumbing/support for L3 fabric flush
+- iris: add plumbing/support for L3 fabric flush
+- iris: add depth, DC and L3 fabric flush for aux map invalidation
+- anv: add depth, DC and L3 fabric flush for aux map invalidation
+- drirc/anv: force_vk_vendor=-1 for Silent Hill 2
+- mesa: fix DXT1 support with EXT_texture_compression_dxt1
+
+Timothy Arceri (2):
+
+- nir/glsl: set cast mode for image during function inlining
+- nir/glsl: set deref cast mode for blocks during function inlining

include/pci_ids/iris_pci_ids.h

@@ -271,6 +271,7 @@ CHIPSET(0x7d41, arl_u, "ARL", "Intel(R) Graphics")
 CHIPSET(0x7d51, arl_h, "ARL", "Intel(R) Graphics")
 CHIPSET(0x7d67, arl_u, "ARL", "Intel(R) Graphics")
 CHIPSET(0x7dd1, arl_h, "ARL", "Intel(R) Graphics")
+CHIPSET(0xb640, arl_u, "ARL", "Intel(R) Graphics")
 
 CHIPSET(0xe202, bmg, "BMG G21", "Intel(R) Graphics")
 CHIPSET(0xe20b, bmg, "BMG G21", "Intel(R) Graphics")

src/amd/common/meson.build

@@ -153,6 +153,7 @@ if with_tests and not with_platform_windows
       include_directories : [
         inc_amd, inc_include, inc_src,
       ],
+      c_args : cpp_args_addrlib,
       dependencies: [idep_amdgfxregs_h, dep_libdrm_amdgpu, idep_mesautil],
     ),
     suite: ['amd']
@@ -169,6 +170,7 @@ if with_tests and not with_platform_windows
         include_directories : [
           inc_amd, inc_include, inc_src,
         ],
+        c_args : cpp_args_addrlib,
         dependencies: [idep_amdgfxregs_h, dep_libdrm_amdgpu, idep_mesautil, dep_openmp],
       ),
       suite: ['amd']

src/amd/vulkan/radv_buffer.c

@@ -85,6 +85,15 @@ radv_create_buffer(struct radv_device *device, const VkBufferCreateInfo *pCreate
    buffer->bo_va = 0;
    buffer->range = 0;
 
+   uint64_t replay_address = 0;
+   const VkBufferOpaqueCaptureAddressCreateInfo *replay_info =
+      vk_find_struct_const(pCreateInfo->pNext, BUFFER_OPAQUE_CAPTURE_ADDRESS_CREATE_INFO);
+   if (replay_info && replay_info->opaqueCaptureAddress)
+      replay_address = replay_info->opaqueCaptureAddress;
+
+   if (pCreateInfo->flags & VK_BUFFER_CREATE_DEVICE_ADDRESS_CAPTURE_REPLAY_BIT)
+      buffer->bo_va = replay_address;
+
    if (pCreateInfo->flags & VK_BUFFER_CREATE_SPARSE_BINDING_BIT) {
       enum radeon_bo_flag flags = RADEON_FLAG_VIRTUAL;
       if (pCreateInfo->flags & VK_BUFFER_CREATE_DEVICE_ADDRESS_CAPTURE_REPLAY_BIT)
@@ -93,18 +102,14 @@ radv_create_buffer(struct radv_device *device, const VkBufferCreateInfo *pCreate
           (VK_BUFFER_USAGE_2_RESOURCE_DESCRIPTOR_BUFFER_BIT_EXT | VK_BUFFER_USAGE_2_SAMPLER_DESCRIPTOR_BUFFER_BIT_EXT))
          flags |= RADEON_FLAG_32BIT;
 
-      uint64_t replay_address = 0;
-      const VkBufferOpaqueCaptureAddressCreateInfo *replay_info =
-         vk_find_struct_const(pCreateInfo->pNext, BUFFER_OPAQUE_CAPTURE_ADDRESS_CREATE_INFO);
-      if (replay_info && replay_info->opaqueCaptureAddress)
-         replay_address = replay_info->opaqueCaptureAddress;
-
       VkResult result = radv_bo_create(device, &buffer->vk.base, align64(buffer->vk.size, 4096), 4096, 0, flags,
                                        RADV_BO_PRIORITY_VIRTUAL, replay_address, is_internal, &buffer->bo);
       if (result != VK_SUCCESS) {
          radv_destroy_buffer(device, pAllocator, buffer);
          return vk_error(device, result);
       }
+
+      buffer->bo_va = radv_buffer_get_va(buffer->bo);
    }
 
    *pBuffer = radv_buffer_to_handle(buffer);
@@ -259,14 +264,14 @@ VKAPI_ATTR VkDeviceAddress VKAPI_CALL
 radv_GetBufferDeviceAddress(VkDevice device, const VkBufferDeviceAddressInfo *pInfo)
 {
    VK_FROM_HANDLE(radv_buffer, buffer, pInfo->buffer);
-   return radv_buffer_get_va(buffer->bo) + buffer->offset;
+   return buffer->bo_va + buffer->offset;
 }
 
 VKAPI_ATTR uint64_t VKAPI_CALL
 radv_GetBufferOpaqueCaptureAddress(VkDevice device, const VkBufferDeviceAddressInfo *pInfo)
 {
    VK_FROM_HANDLE(radv_buffer, buffer, pInfo->buffer);
-   return buffer->bo ? radv_buffer_get_va(buffer->bo) + buffer->offset : 0;
+   return buffer->bo_va + buffer->offset;
 }
 
 VkResult

src/amd/vulkan/radv_cmd_buffer.c

@@ -11453,7 +11453,7 @@ radv_CmdPreprocessGeneratedCommandsNV(VkCommandBuffer commandBuffer,
    const bool old_predicating = cmd_buffer->state.predicating;
    cmd_buffer->state.predicating = false;
 
-   radv_prepare_dgc(cmd_buffer, pGeneratedCommandsInfo, false);
+   radv_prepare_dgc(cmd_buffer, pGeneratedCommandsInfo, old_predicating);
 
    /* Restore conditional rendering. */
    cmd_buffer->state.predicating = old_predicating;

src/amd/vulkan/radv_physical_device.c

@@ -708,8 +708,8 @@ radv_physical_device_get_supported_extensions(const struct radv_physical_device
       .INTEL_shader_integer_functions2 = true,
       .MESA_image_alignment_control = pdev->info.gfx_level >= GFX9 && pdev->info.gfx_level <= GFX11_5,
       .NV_compute_shader_derivatives = true,
-      .NV_device_generated_commands = instance->drirc.enable_dgc,
-      .NV_device_generated_commands_compute = instance->drirc.enable_dgc,
+      .NV_device_generated_commands = pdev->info.gfx_level >= GFX8 && instance->drirc.enable_dgc,
+      .NV_device_generated_commands_compute = pdev->info.gfx_level >= GFX8 && instance->drirc.enable_dgc,
       /* Undocumented extension purely for vkd3d-proton. This check is to prevent anyone else from
        * using it.
        */
@@ -983,7 +983,7 @@ radv_physical_device_get_features(const struct radv_physical_device *pdev, struc
       .descriptorBindingAccelerationStructureUpdateAfterBind = true,
 
       /* VK_EXT_buffer_device_address */
-      .bufferDeviceAddressCaptureReplayEXT = true,
+      .bufferDeviceAddressCaptureReplayEXT = false,
 
       /* VK_KHR_shader_subgroup_uniform_control_flow */
       .shaderSubgroupUniformControlFlow = true,

src/compiler/nir/nir_functions.c

@@ -62,9 +62,18 @@ static void
 fixup_cast_deref_mode(nir_deref_instr *deref)
 {
    nir_deref_instr *parent = nir_src_as_deref(deref->parent);
-   if (parent && parent->modes & nir_var_uniform &&
-       deref->modes & nir_var_function_temp) {
-      deref->modes |= nir_var_uniform;
+   if (parent && deref->modes & nir_var_function_temp) {
+      if (parent->modes & nir_var_uniform) {
+         deref->modes |= nir_var_uniform;
+      } else if (parent->modes & nir_var_image) {
+         deref->modes |= nir_var_image;
+      } else if (parent->modes & nir_var_mem_ubo) {
+         deref->modes |= nir_var_mem_ubo;
+      } else if (parent->modes & nir_var_mem_ssbo) {
+         deref->modes |= nir_var_mem_ssbo;
+      } else
+         return;
+
       deref->modes ^= nir_var_function_temp;
 
       nir_foreach_use(use, &deref->def) {

src/compiler/nir/nir_lower_mediump.c

@@ -994,9 +994,11 @@ opt_16bit_tex_srcs(nir_builder *b, nir_tex_instr *tex,
       /* Zero-extension (u16) and sign-extension (i16) have
        * the same behavior here - txf returns 0 if bit 15 is set
        * because it's out of bounds and the higher bits don't
-       * matter.
+       * matter. With the exception of a texel buffer, which could
+       * be arbitrary large.
        */
-      if (!can_opt_16bit_src(src->ssa, src_type, false))
+      bool sext_matters = tex->sampler_dim == GLSL_SAMPLER_DIM_BUF;
+      if (!can_opt_16bit_src(src->ssa, src_type, sext_matters))
          return false;
 
       opt_srcs |= (1 << i);

src/compiler/nir/nir_opt_vectorize_io.c

@@ -179,7 +179,12 @@ vectorize_store(nir_intrinsic_instr *chan[8], unsigned start, unsigned count,
     * because we need to read some info from "last" before overwriting it.
     */
    if (nir_intrinsic_has_io_xfb(last)) {
-      nir_io_xfb xfb[2] = {{{{0}}}};
+      /* 0 = low/full XY channels
+       * 1 = low/full ZW channels
+       * 2 = high XY channels
+       * 3 = high ZW channels
+       */
+      nir_io_xfb xfb[4] = {{{{0}}}};
 
       for (unsigned i = start; i < start + count; i++) {
          xfb[i / 2].out[i % 2] =
@@ -275,7 +280,7 @@ vectorize_store(nir_intrinsic_instr *chan[8], unsigned start, unsigned count,
 
       nir_src_rewrite(&last->src[0], nir_vec(&b, &value[start], count));
    } else {
-      nir_def *value[4];
+      nir_def *value[8];
       for (unsigned i = start; i < start + count; i++)
          value[i] = chan[i]->src[0].ssa;
 

src/gallium/auxiliary/gallivm/lp_bld_misc.cpp

@@ -329,8 +329,14 @@ lp_build_fill_mattrs(std::vector<std::string> &MAttrs)
     * which allows us to enable/disable code generation based
     * on the results of cpuid on these architectures.
     */
-   llvm::StringMap<bool> features;
-   llvm::sys::getHostCPUFeatures(features);
+   #if LLVM_VERSION_MAJOR >= 19
+      /* llvm-19+ returns StringMap from getHostCPUFeatures.
+      */
+      auto features = llvm::sys::getHostCPUFeatures();
+   #else
+      llvm::StringMap<bool> features;
+      llvm::sys::getHostCPUFeatures(features);
+   #endif
 
    for (llvm::StringMapIterator<bool> f = features.begin();
         f != features.end();