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fix(prover): Add signed to LOAD bus interaction signature#294

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MauroToscano merged 1 commit into
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fix_load_bus
Feb 6, 2026
Merged

fix(prover): Add signed to LOAD bus interaction signature#294
MauroToscano merged 1 commit into
mainfrom
fix_load_bus

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@ColoCarletti
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Aligns the LOAD bus interaction (LOAD-C9) with the spec update from #284, which added signed to the
interaction input signature.

Both sides of the BusId::Load interaction were missing the signed field:

  • load.rs: Added signed to the LOAD-C9 receiver
  • cpu.rs: Added signed to the CPU-CM51 sender

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github-actions Bot commented Feb 6, 2026

Kimi Code Review

Review

File: prover/src/tables/cpu.rs

Line 1408-1414:

  • Issue: The comment and code are updated to include a new signed flag for the LOAD operation. This is a change in the expected bus interaction structure.
  • Action: Ensure that the addition of the signed flag is correctly handled in the rest of the codebase, particularly in the logic that processes these bus interactions. This includes verifying that the cols::SIGNED column is correctly defined and used elsewhere.

Line 1450-1456:

  • Issue: The BusInteraction structure is updated to include a new signed flag. This change should be reflected in the corresponding logic that handles bus interactions.
  • Action: Verify that the addition of the signed flag does not break existing functionality and that it is correctly integrated into the bus interaction processing logic.

File: prover/src/tables/load.rs

Line 425-431:

  • Issue: Similar to cpu.rs, the comment and code are updated to include a signed flag in the LOAD operation specification.
  • Action: Ensure that the addition of the signed flag is consistent with the changes made in cpu.rs and that it is correctly handled in the bus interaction processing logic.

Line 461-467:

  • Issue: The BusInteraction structure is updated to include a new signed flag, similar to the changes in cpu.rs.
  • Action: Verify that the addition of the signed flag is consistent with the changes made in cpu.rs and that it is correctly integrated into the bus interaction processing logic.

Conclusion

The changes in both files are consistent with each other, adding a signed flag to the LOAD operation's bus interactions. The primary concern is ensuring that these changes are correctly integrated into the rest of the codebase, particularly in the logic that processes bus interactions. No immediate security vulnerabilities or performance issues are identified based on the provided diff. However, thorough testing is recommended to ensure that the addition of the signed flag does not introduce any bugs or unexpected behavior.


Automated review by Kimi (Moonshot AI)

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github-actions Bot commented Feb 6, 2026

Codex Code Review

No issues found in the diff. The added signed bus field is mirrored on both CPU and LOAD sides, so the arity stays consistent. I don’t see security, correctness, or performance risks introduced here.

@claude
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claude Bot commented Feb 6, 2026

Code Review Summary

After reviewing this PR, I found no issues. The changes correctly implement the spec update from #284.

What this PR does:

  • Adds the signed field to the LOAD bus interaction signature (LOAD-C9)
  • Updates both the sender side (CPU table) and receiver side (LOAD table)
  • Aligns with the spec change that added signed to the interaction input signature

Verification:

Correctness: Both sides of the interaction now include the signed field as the last element
Column exists: cols::SIGNED is defined in both tables (cpu.rs:112, load.rs:58)
Trace generation: The signed field is correctly populated during trace generation (cpu.rs:684, load.rs:208)
Element count: Updated comment correctly states 10 elements (was 9, now includes signed)
Spec alignment: Matches the spec update from PR #284 which added signed to the LOAD interaction signature

The implementation is straightforward and correct.

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greptile-apps Bot commented Feb 6, 2026

Greptile Overview

Greptile Summary

Added the signed field to both sides of the BusId::Load interaction, aligning with the spec update that requires sign/zero-extension information for load operations.

  • cpu.rs (CPU-CM51 sender): Added signed flag as the 10th bus element using cols::SIGNED with Direct packing
  • load.rs (LOAD-C9 receiver): Added signed flag as the 10th bus element using cols::SIGNED with Direct packing

Both sides now match exactly with the updated signature: LOAD[result; base_address, timestamp, read2, read4, read8, signed]. The cols::SIGNED column already exists in both tables and is populated during trace generation, so no additional changes were needed.

Confidence Score: 5/5

  • This PR is safe to merge with no risk
  • The changes are minimal, symmetric, and correctly implement the spec update. Both the sender and receiver sides of the bus interaction were updated identically, adding the same signed field in the same position using the same packing method. The required cols::SIGNED column already exists in both tables and is properly populated during trace generation. The updated comments accurately reflect the new 10-element signature.
  • No files require special attention

Important Files Changed

Filename Overview
prover/src/tables/cpu.rs Added signed flag to CPU-CM51 LOAD bus sender (lines 1453-1457), aligning with spec update
prover/src/tables/load.rs Added signed flag to LOAD-C9 bus receiver (lines 464-468), completing the bus interaction signature update

Sequence Diagram

sequenceDiagram
    participant CPU as CPU Table (cpu.rs)
    participant LoadBus as LOAD Bus
    participant LOAD as LOAD Table (load.rs)
    
    Note over CPU,LOAD: Bus Interaction Signature Update
    
    CPU->>LoadBus: Send LOAD interaction (M6/CPU-CM51)
    Note right of CPU: rvd, base_address, timestamp<br/>read2, read4, read8, signed
    Note right of CPU: Added signed flag from cols::SIGNED
    
    LoadBus->>LOAD: Receive LOAD interaction (LOAD-C9)
    Note right of LOAD: res, base_address, timestamp<br/>read2, read4, read8, signed
    Note right of LOAD: Added signed flag from cols::SIGNED
    
    Note over CPU,LOAD: Both sides aligned with spec<br/>Total bus elements: 10 (was 9)
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github-actions Bot commented Feb 6, 2026

Benchmark Results for unmodified programs 🚀

Command Mean [ms] Min [ms] Max [ms] Relative
base binary_search 64.1 ± 2.4 62.1 68.1 1.00
head binary_search 67.8 ± 8.2 62.1 89.1 1.06 ± 0.13
Command Mean [ms] Min [ms] Max [ms] Relative
base bitwise_ops 65.4 ± 3.6 62.2 69.7 1.00
head bitwise_ops 66.3 ± 3.6 62.5 70.0 1.01 ± 0.08
Command Mean [ms] Min [ms] Max [ms] Relative
base fibonacci_26 67.7 ± 2.6 65.3 71.5 1.01 ± 0.05
head fibonacci_26 67.1 ± 2.3 65.6 71.5 1.00
Command Mean [ms] Min [ms] Max [ms] Relative
base hashmap 131.7 ± 2.3 129.3 135.5 1.00
head hashmap 134.1 ± 3.6 130.3 142.0 1.02 ± 0.03
Command Mean [ms] Min [ms] Max [ms] Relative
base keccak 126.8 ± 1.7 124.9 129.8 1.00
head keccak 128.9 ± 3.7 125.8 136.3 1.02 ± 0.03
Command Mean [ms] Min [ms] Max [ms] Relative
base matrix_multiply 68.7 ± 1.7 67.1 71.4 1.00
head matrix_multiply 69.1 ± 1.8 67.0 72.7 1.01 ± 0.04
Command Mean [ms] Min [ms] Max [ms] Relative
base modular_exp 66.2 ± 3.7 61.6 69.3 1.00 ± 0.13
head modular_exp 66.0 ± 7.6 61.7 85.7 1.00
Command Mean [ms] Min [ms] Max [ms] Relative
base quicksort 70.8 ± 5.6 66.0 81.6 1.05 ± 0.09
head quicksort 67.7 ± 2.4 65.6 71.2 1.00
Command Mean [ms] Min [ms] Max [ms] Relative
base sieve 70.4 ± 1.9 69.2 75.5 1.00
head sieve 73.6 ± 3.6 70.1 80.9 1.05 ± 0.06
Command Mean [ms] Min [ms] Max [ms] Relative
base sum_array 80.8 ± 2.9 77.7 86.9 1.00
head sum_array 81.0 ± 2.3 77.9 84.5 1.00 ± 0.05
Command Mean [ms] Min [ms] Max [ms] Relative
base syscall_commit 98.7 ± 4.4 95.3 106.7 1.01 ± 0.06
head syscall_commit 97.9 ± 3.2 96.0 106.8 1.00

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github-actions Bot commented Feb 6, 2026

📊 Memory Profile Results

Program: loop_4096 (4097 instructions)

Metric Value
Peak Memory 231.71 MB
Total Allocated 4251.33 MB

Peak Allocation Stack Trace:

0x559c5081c302: <dhat::Alloc as core::alloc::global::GlobalAlloc>::alloc (???:0:0)
0x559c5070afd2: stark::table::Table<F>::from_columns (???:0:0)
0x559c5070d498: stark::prover::IsStarkProver::multi_prove (???:0:0)
0x559c506b9bfe: lambda_vm_prover::tests::prove_elfs_tests::prove_and_verify_vm_minimal (???:0:0)
0x559c506c6fdb: lambda_vm_prover::tests::prove_elfs_tests::test_dhat_memory_profile (???:0:0)

ℹ️ No baseline found on main branch for comparison.

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  2. Extract dhat-heap.json from the zip
  3. Upload to dh_view

@MauroToscano MauroToscano added this pull request to the merge queue Feb 6, 2026
Merged via the queue into main with commit c3c8958 Feb 6, 2026
14 checks passed
@MauroToscano MauroToscano deleted the fix_load_bus branch February 6, 2026 18:38
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2 participants