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std.Target: A bunch of C type size/alignment fixes #20960

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Merged
andrewrk merged 14 commits into from
Aug 6, 2024
Merged

std.Target: A bunch of C type size/alignment fixes #20960

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ab154be
std.Target: Fix ptrBitWidth_cpu_abi() for dxil (64-bit, not 32-bit).
alexrp Aug 6, 2024
db8f00e
std.Target: Fix ptrBitWidth_cpu_abi() for sparc32.
alexrp Aug 6, 2024
e67388c
std.Target: Fix C type alignment calculation for dxil.
alexrp Aug 6, 2024
29321ca
std.Target: Fix C type alignment calculation for spirv32.
alexrp Aug 6, 2024
98153c8
std.Target: Fix C type alignment calculation for loongarch64.
alexrp Aug 6, 2024
e678862
std.Target: Fix C type alignment calculation for sparc64.
alexrp Aug 6, 2024
5dd66cd
std.Target: Fix C type alignment calculation for ve.
alexrp Aug 6, 2024
606d011
std.Target: Fix C long long size for opencl (8, not 16).
alexrp Aug 6, 2024
a1d3e56
std.Target: Fix C long double size for opencl (8, not 16).
alexrp Aug 6, 2024
eef4998
std.Target: Fix C long double size for amdhsa, amdpal, and mesa3d (8,…
alexrp Aug 6, 2024
7b47ebe
std.Target: Fix C long double size for sparc32 (8, not 16).
alexrp Aug 6, 2024
231f322
std.Target: Fix C long double size for ve (16, not 8).
alexrp Aug 6, 2024
23b5a6c
std.Target: Treat spirv as identical to spirv64 for ABI size/alignmen…
alexrp Aug 6, 2024
ef502da
std.Target: Handle mesa3d in c_type_bit_size().
alexrp Aug 6, 2024
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50 changes: 21 additions & 29 deletions lib/std/Target.zig
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Original file line number Diff line number Diff line change
Expand Up @@ -1852,14 +1852,15 @@ pub fn ptrBitWidth_cpu_abi(cpu: Cpu, abi: Abi) u16 {
.kalimba,
.lanai,
.wasm32,
.sparc,
.spirv32,
.loongarch32,
.dxil,
.xtensa,
=> 32,

.aarch64,
.aarch64_be,
.dxil,
.mips64,
.mips64el,
.powerpc64,
Expand All @@ -1874,13 +1875,10 @@ pub fn ptrBitWidth_cpu_abi(cpu: Cpu, abi: Abi) u16 {
.sparc64,
.s390x,
.ve,
.spirv,
.spirv64,
.loongarch64,
=> 64,

.sparc => if (std.Target.sparc.featureSetHas(cpu.features, .v9)) 64 else 32,

.spirv => @panic("TODO what should this value be?"),
};
}

Expand Down Expand Up @@ -2061,12 +2059,12 @@ pub fn c_type_bit_size(target: Target, c_type: CType) u16 {
.aarch64,
.aarch64_be,
.s390x,
.sparc,
.sparc64,
.wasm32,
.wasm64,
.loongarch32,
.loongarch64,
.ve,
=> return 128,

else => return 64,
Expand Down Expand Up @@ -2167,12 +2165,12 @@ pub fn c_type_bit_size(target: Target, c_type: CType) u16 {
.s390x,
.mips64,
.mips64el,
.sparc,
.sparc64,
.wasm32,
.wasm64,
.loongarch32,
.loongarch64,
.ve,
=> return 128,

else => return 64,
Expand Down Expand Up @@ -2252,23 +2250,20 @@ pub fn c_type_bit_size(target: Target, c_type: CType) u16 {
.longdouble => return 64,
},

.amdhsa, .amdpal => switch (c_type) {
.amdhsa, .amdpal, .mesa3d => switch (c_type) {
.char => return 8,
.short, .ushort => return 16,
.int, .uint, .float => return 32,
.long, .ulong, .longlong, .ulonglong, .double => return 64,
.longdouble => return 128,
.longdouble => return 64,
},

.opencl, .vulkan => switch (c_type) {
.char => return 8,
.short, .ushort => return 16,
.int, .uint, .float => return 32,
.long, .ulong, .double => return 64,
.longlong, .ulonglong => return 128,
// Note: The OpenCL specification does not guarantee a particular size for long double,
// but clang uses 128 bits.
.longdouble => return 128,
.long, .ulong, .longlong, .ulonglong, .double => return 64,
.longdouble => return 64,
},

.ps4, .ps5 => switch (c_type) {
Expand All @@ -2285,7 +2280,6 @@ pub fn c_type_bit_size(target: Target, c_type: CType) u16 {
.rtems,
.aix,
.elfiamcu,
.mesa3d,
.contiki,
.hermit,
.hurd,
Expand Down Expand Up @@ -2344,34 +2338,33 @@ pub fn c_type_alignment(target: Target, c_type: CType) u16 {
.csky,
.x86,
.xcore,
.dxil,
.loongarch32,
.spirv32,
.kalimba,
.ve,
.spu_2,
.xtensa,
=> 4,

.amdgcn,
.bpfel,
.bpfeb,
.dxil,
.hexagon,
.loongarch64,
.m68k,
.mips,
.mipsel,
.sparc,
.sparc64,
.lanai,
.nvptx,
.nvptx64,
.s390x,
.spirv,
.spirv32,
.spirv64,
=> 8,

.aarch64,
.aarch64_be,
.loongarch64,
.mips64,
.mips64el,
.powerpc,
Expand All @@ -2380,12 +2373,12 @@ pub fn c_type_alignment(target: Target, c_type: CType) u16 {
.powerpc64le,
.riscv32,
.riscv64,
.sparc64,
.x86_64,
.ve,
.wasm32,
.wasm64,
=> 16,

.spirv => @panic("TODO what should this value be?"),
}),
);
}
Expand Down Expand Up @@ -2449,11 +2442,8 @@ pub fn c_type_preferred_alignment(target: Target, c_type: CType) u16 {

.csky,
.xcore,
.dxil,
.loongarch32,
.spirv32,
.kalimba,
.ve,
.spu_2,
.xtensa,
=> 4,
Expand All @@ -2467,23 +2457,25 @@ pub fn c_type_preferred_alignment(target: Target, c_type: CType) u16 {
.amdgcn,
.bpfel,
.bpfeb,
.dxil,
.hexagon,
.x86,
.loongarch64,
.m68k,
.mips,
.mipsel,
.sparc,
.sparc64,
.lanai,
.nvptx,
.nvptx64,
.s390x,
.spirv,
.spirv32,
.spirv64,
=> 8,

.aarch64,
.aarch64_be,
.loongarch64,
.mips64,
.mips64el,
.powerpc,
Expand All @@ -2492,12 +2484,12 @@ pub fn c_type_preferred_alignment(target: Target, c_type: CType) u16 {
.powerpc64le,
.riscv32,
.riscv64,
.sparc64,
.x86_64,
.ve,
.wasm32,
.wasm64,
=> 16,

.spirv => @panic("TODO what should this value be?"),
}),
);
}
Expand Down