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Refine POSTBUILD for spresense and esp32-core #612

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Merged
Ouss4 merged 2 commits into from
Mar 23, 2020
Merged

Refine POSTBUILD for spresense and esp32-core #612

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477bb5d
Move CXD56_BINARY to boards/arm/cxd56xx/spresense/Kconfig
xiaoxiang781216 Mar 23, 2020
3b71ffd
esp32: Guard the binary generation with CONFIG_ESP32CORE_BINARY
xiaoxiang781216 Mar 23, 2020
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7 changes: 0 additions & 7 deletions Kconfig
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Expand Up @@ -279,13 +279,6 @@ endmenu # Build Setup

menu "Binary Output Formats"

config CXD56_BINARY
bool "spk binary format"
default n
---help---
Create nuttx.spk binary format used on spresense board and boards
based on cxd56xx arch.

config INTELHEX_BINARY
bool "Intel HEX binary format"
default n
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7 changes: 7 additions & 0 deletions boards/arm/cxd56xx/spresense/Kconfig
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Expand Up @@ -125,4 +125,11 @@ endif # CXD56_LTE_SPI4

endif # CXD56_LTE

config CXD56_BINARY
bool "spk binary format"
default n
---help---
Create nuttx.spk binary format used on spresense board and boards
based on cxd56xx arch.

endif
2 changes: 1 addition & 1 deletion boards/arm/cxd56xx/scripts/Config.mk → ...s/arm/cxd56xx/spresense/scripts/Config.mk
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@@ -1,5 +1,5 @@
############################################################################
# board/arm/cxd56xx/script/Config.mk
# board/arm/cxd56xx/spresense/script/Config.mk
#
# Licensed to the Apache Software Foundation (ASF) under one or more
# contributor license agreements. See the NOTICE file distributed with
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2 changes: 1 addition & 1 deletion boards/arm/cxd56xx/spresense/scripts/Make.defs
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Expand Up @@ -35,7 +35,7 @@

include ${TOPDIR}/.config
include ${TOPDIR}/tools/Config.mk
include ${TOPDIR}/boards/arm/cxd56xx/scripts/Config.mk
include ${TOPDIR}/boards/arm/cxd56xx/spresense/scripts/Config.mk
include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs

# Setup for the kind of memory that we are executing from
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6 changes: 6 additions & 0 deletions boards/xtensa/esp32/esp32-core/Kconfig
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Expand Up @@ -38,4 +38,10 @@ config ESP32CORE_RUN_IRAM
allows interoperability with the esp-idf system but makes you
reliant on the esp-idf design for these parts. Both are possible.

config ESP32CORE_FLASH_IMAGE
bool "esp32 flash image"
default n
---help---
Create flash_image.bin mainly used for QEMU.

endif # ARCH_BOARD_ESP32CORE
2 changes: 2 additions & 0 deletions boards/xtensa/esp32/esp32-core/scripts/Config.mk
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Expand Up @@ -24,6 +24,7 @@

# POSTBUILD -- Perform post build operations

ifeq ($(CONFIG_ESP32CORE_FLASH_IMAGE),y)
define POSTBUILD
@echo "MKIMAGE: ESP32 binary"
$(Q) if ! esptool.py version ; then \
Expand All @@ -47,3 +48,4 @@ define POSTBUILD
echo "Generated: flash_image.bin (it can be run with 'qemu-system-xtensa -nographic -machine esp32 -drive file=flash_image.bin,if=mtd,format=raw')"; \
fi
endef
endif