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| ;;@ (= (extract 2 0 (arg)) (0i3:bv)) | ||
| ;;@ )), | ||
| ;;@ (= (arg) (ret)) | ||
| ;;@ )) |
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To get around the "query width unused", we need more complicated logic for (= (arg) (ret)): Imm12 can be a different width from Value.
On option would be something like:
(= (arg) (conv_to (widthof (arg)) (ret))
avanhatt
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Looks good to me!
A weird subset of tests are actually failing, but I don't see why from this PR.
Should I wait to merge? Do you think it might be due to the |
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Let me try to run locally first, will report back in a few. |
| ( | ||
| "Imm12".to_owned(), | ||
| annotation_ir::Type::BitVectorWithWidth(12), | ||
| annotation_ir::Type::BitVectorWithWidth(24), |
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Looks like this change is making the failing tests fail locally, too. Doing a quick pass to see if I can update them.
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No tests failing, but these two failed to terminate after 3 hours in CI: |
I've definitely run all the |
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Things now work locally, so force merging |
This gets us another step closer to running the Wasmtime tests.
Generate the `SubS` case for `AluRRR` instructions. Updates avanhatt#42 #35
Generate ASLp-based spec for the `BitRR` instruction `Cls` opcode. Updates #35 avanhatt#42 avanhatt#62
Implement the encoded spec ops `clz` and `rev`. Use them to verify the `clz` and `ctz` lowerings. Updates avanhatt#42 #34 Co-authored-by: Vaishu Chintam <jc103@wellesley.edu>
Allow to map host directory as arbitary guest path
Works, but since type inference prioritizes known bit widths, it thinks the args to
iaddhave whatever widthimm12has. This is causing "query width unused."