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Merged
abrown merged 6 commits into from
Mar 6, 2025
Merged

asm: SSE ALU Instructions #10316

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e8831ec
implement andpd sse instruction
rahulchaphalkar Feb 28, 2025
9990896
impl xorps
rahulchaphalkar Mar 1, 2025
5c94431
orps instr
rahulchaphalkar Mar 1, 2025
37fae1b
bless clif tests
rahulchaphalkar Mar 2, 2025
1ca401d
remove old isle emission
rahulchaphalkar Mar 6, 2025
ea496dc
reorder instructions in ascending order of size, added comment
rahulchaphalkar Mar 6, 2025
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3 changes: 3 additions & 0 deletions cranelift/assembler-x64/meta/src/instructions/add.rs
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Expand Up @@ -21,6 +21,9 @@ pub fn list() -> Vec<Inst> {
inst("addw", fmt("RM", [rw(r16), r(rm16)]), rex([0x66, 0x3]).r(), _64b | compat),
inst("addl", fmt("RM", [rw(r32), r(rm32)]), rex(0x3).r(), _64b | compat),
inst("addq", fmt("RM", [rw(r64), r(rm64)]), rex(0x3).w().r(), _64b),
// SSE vector instructions
inst("addps", fmt("A", [rw(xmm), r(rm128)]), rex([0x0F, 0x58]).r(), _64b),
inst("addpd", fmt("A", [rw(xmm), r(rm128)]), rex([0x66, 0x0F, 0x58]).r(), _64b),
// Add with carry.
inst("adcb", fmt("I", [rw(al), r(imm8)]), rex(0x14).ib(), _64b | compat),
inst("adcw", fmt("I", [rw(ax), r(imm16)]), rex([0x66, 0x15]).iw(), _64b | compat),
Expand Down
3 changes: 3 additions & 0 deletions cranelift/assembler-x64/meta/src/instructions/and.rs
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Expand Up @@ -28,5 +28,8 @@ pub fn list() -> Vec<Inst> {
inst("andw", fmt("RM", [rw(r16), r(rm16)]), rex([0x66, 0x23]).r(), _64b | compat),
inst("andl", fmt("RM", [rw(r32), r(rm32)]), rex(0x23).r(), _64b | compat),
inst("andq", fmt("RM", [rw(r64), r(rm64)]), rex(0x23).w().r(), _64b),
// SSE vector instructions
inst("andps", fmt("A", [rw(xmm), r(rm128)]), rex([0x0F, 0x54]).r(), _64b),
inst("andpd", fmt("A", [rw(xmm), r(rm128)]), rex([0x66, 0x0F, 0x54]).r(), _64b),
]
}
2 changes: 2 additions & 0 deletions cranelift/assembler-x64/meta/src/instructions/or.rs
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Expand Up @@ -21,6 +21,8 @@ pub fn list() -> Vec<Inst> {
inst("orw", fmt("RM", [rw(r16), r(rm16)]), rex([0x66, 0x0B]).r(), _64b | compat),
inst("orl", fmt("RM", [rw(r32), r(rm32)]), rex(0x0B).r(), _64b | compat),
inst("orq", fmt("RM", [rw(r64), r(rm64)]), rex(0x0B).w().r(), _64b),
// SSE vector instructions
inst("orps", fmt("A", [rw(xmm), r(rm128)]), rex([0x0F, 0x56]).r(), _64b),
inst("orpd", fmt("A", [rw(xmm), r(rm128)]), rex([0x66, 0x0F, 0x56]).r(), _64b),
]
}
3 changes: 3 additions & 0 deletions cranelift/assembler-x64/meta/src/instructions/sub.rs
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Expand Up @@ -21,6 +21,9 @@ pub fn list() -> Vec<Inst> {
inst("subw", fmt("RM", [rw(r16), r(rm16)]), rex([0x66, 0x2B]).r(), _64b | compat),
inst("subl", fmt("RM", [rw(r32), r(rm32)]), rex(0x2B).r(), _64b | compat),
inst("subq", fmt("RM", [rw(r64), r(rm64)]), rex(0x2B).w().r(), _64b),
// SSE vector instructions
inst("subps", fmt("A", [rw(xmm), r(rm128)]), rex([0x0F, 0x5C]).r(), _64b),
inst("subpd", fmt("A", [rw(xmm), r(rm128)]), rex([0x66, 0x0F, 0x5C]).r(), _64b),
// Subtract with borrow.
inst("sbbb", fmt("I", [rw(al), r(imm8)]), rex(0x1C).ib(), _64b | compat),
inst("sbbw", fmt("I", [rw(ax), r(imm16)]), rex([0x66, 0x1D]).iw(), _64b | compat),
Expand Down
3 changes: 3 additions & 0 deletions cranelift/assembler-x64/meta/src/instructions/xor.rs
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Expand Up @@ -21,5 +21,8 @@ pub fn list() -> Vec<Inst> {
inst("xorw", fmt("RM", [rw(r16), r(rm16)]), rex([0x66, 0x33]).r(), _64b | compat),
inst("xorl", fmt("RM", [rw(r32), r(rm32)]), rex(0x33).r(), _64b | compat),
inst("xorq", fmt("RM", [rw(r64), r(rm64)]), rex(0x33).w().r(), _64b),
// SSE vector instructions
inst("xorps", fmt("A", [rw(xmm), r(rm128)]), rex([0x0F, 0x57]).r(), _64b),
inst("xorpd", fmt("A", [rw(xmm), r(rm128)]), rex([0x66, 0x0F, 0x57]).r(), _64b),
]
}
27 changes: 9 additions & 18 deletions cranelift/codegen/src/isa/x64/inst.isle
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Expand Up @@ -3568,19 +3568,17 @@

;; Helper for creating `andps` instructions.
(decl x64_andps (Xmm XmmMem) Xmm)
(rule 0 (x64_andps src1 src2)
(xmm_rm_r (SseOpcode.Andps) src1 src2))
(rule 1 (x64_andps src1 src2)
(if-let true (use_avx))
(xmm_rmir_vex (AvxOpcode.Vandps) src1 src2))
(rule 0 (x64_andps src1 src2) (x64_andps_a src1 src2))

;; Helper for creating `andpd` instructions.
(decl x64_andpd (Xmm XmmMem) Xmm)
(rule 0 (x64_andpd src1 src2)
(xmm_rm_r (SseOpcode.Andpd) src1 src2))
(rule 1 (x64_andpd src1 src2)
(if-let true (use_avx))
(xmm_rmir_vex (AvxOpcode.Vandpd) src1 src2))
(rule 0 (x64_andpd src1 src2) (x64_andpd_a src1 src2))

;; Helper for creating `por` instructions.
(decl x64_por (Xmm XmmMem) Xmm)
Expand All @@ -3592,11 +3590,10 @@

;; Helper for creating `orps` instructions.
(decl x64_orps (Xmm XmmMem) Xmm)
(rule 0 (x64_orps src1 src2)
(xmm_rm_r (SseOpcode.Orps) src1 src2))
(rule 1 (x64_orps src1 src2)
(if-let true (use_avx))
(xmm_rmir_vex (AvxOpcode.Vorps) src1 src2))
(rule 0 (x64_orps src1 src2) (x64_orps_a src1 src2))

;; Helper for creating `orpd` instructions.
(decl x64_orpd (Xmm XmmMem) Xmm)
Expand All @@ -3617,19 +3614,17 @@

;; Helper fxor creating `xorps` instructions.
(decl x64_xorps (Xmm XmmMem) Xmm)
(rule 0 (x64_xorps src1 src2)
(xmm_rm_r (SseOpcode.Xorps) src1 src2))
(rule 1 (x64_xorps src1 src2)
(if-let true (use_avx))
(xmm_rmir_vex (AvxOpcode.Vxorps) src1 src2))
(rule 0 (x64_xorps src1 src2) (x64_xorps_a src1 src2))

;; Helper fxor creating `xorpd` instructions.
(decl x64_xorpd (Xmm XmmMem) Xmm)
(rule 0 (x64_xorpd src1 src2)
(xmm_rm_r (SseOpcode.Xorpd) src1 src2))
(rule 1 (x64_xorpd src1 src2)
(if-let true (use_avx))
(xmm_rmir_vex (AvxOpcode.Vxorpd) src1 src2))
(rule 0 (x64_xorpd src1 src2) (x64_xorpd_a src1 src2))

;; Helper for creating `pmullw` instructions.
(decl x64_pmullw (Xmm XmmMem) Xmm)
Expand Down Expand Up @@ -3801,19 +3796,17 @@

;; Helper for creating `addps` instructions.
(decl x64_addps (Xmm XmmMem) Xmm)
(rule 0 (x64_addps src1 src2)
(xmm_rm_r (SseOpcode.Addps) src1 src2))
(rule 1 (x64_addps src1 src2)
(if-let true (use_avx))
(xmm_rmir_vex (AvxOpcode.Vaddps) src1 src2))
(rule 0 (x64_addps src1 src2) (x64_addps_a src1 src2))

;; Helper for creating `addpd` instructions.
(decl x64_addpd (Xmm XmmMem) Xmm)
(rule 0 (x64_addpd src1 src2)
(xmm_rm_r (SseOpcode.Addpd) src1 src2))
(rule 1 (x64_addpd src1 src2)
(if-let true (use_avx))
(xmm_rmir_vex (AvxOpcode.Vaddpd) src1 src2))
(rule 0 (x64_addpd src1 src2) (x64_addpd_a src1 src2))

;; Helper for creating `subss` instructions.
(decl x64_subss (Xmm XmmMem) Xmm)
Expand All @@ -3833,19 +3826,17 @@

;; Helper for creating `subps` instructions.
(decl x64_subps (Xmm XmmMem) Xmm)
(rule 0 (x64_subps src1 src2)
(xmm_rm_r (SseOpcode.Subps) src1 src2))
(rule 1 (x64_subps src1 src2)
(if-let true (use_avx))
(xmm_rmir_vex (AvxOpcode.Vsubps) src1 src2))
(rule 0 (x64_subps src1 src2) (x64_subps_a src1 src2))

;; Helper for creating `subpd` instructions.
(decl x64_subpd (Xmm XmmMem) Xmm)
(rule 0 (x64_subpd src1 src2)
(xmm_rm_r (SseOpcode.Subpd) src1 src2))
(rule 1 (x64_subpd src1 src2)
(if-let true (use_avx))
(xmm_rmir_vex (AvxOpcode.Vsubpd) src1 src2))
(rule 0 (x64_subpd src1 src2) (x64_subpd_a src1 src2))

;; Helper for creating `mulss` instructions.
(decl x64_mulss (Xmm XmmMem) Xmm)
Expand Down
2 changes: 1 addition & 1 deletion cranelift/filetests/filetests/isa/aarch64/nan-canonicalization.clif
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Expand Up @@ -12,7 +12,7 @@ block0(v0: f32x4, v1: f32x4):
; pushq %rbp
; movq %rsp, %rbp
; block0:
; addps %xmm0, %xmm1, %xmm0
; addps %xmm1, %xmm0
; movl $2143289344, %r10d
; movd %r10d, %xmm7
; shufps $0, %xmm7, const(0), %xmm7
Expand Down
2 changes: 1 addition & 1 deletion cranelift/filetests/filetests/isa/x64/f128const.clif
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Expand Up @@ -12,7 +12,7 @@ block0():
; movq %rsp, %rbp
; block0:
; uninit %xmm0
; xorps %xmm0, %xmm0, %xmm0
; xorps %xmm0, %xmm0
; movq %rbp, %rsp
; popq %rbp
; ret
Expand Down
2 changes: 1 addition & 1 deletion cranelift/filetests/filetests/isa/x64/f16const.clif
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Expand Up @@ -12,7 +12,7 @@ block0():
; movq %rsp, %rbp
; block0:
; uninit %xmm0
; xorps %xmm0, %xmm0, %xmm0
; xorps %xmm0, %xmm0
; movq %rbp, %rsp
; popq %rbp
; ret
Expand Down
8 changes: 4 additions & 4 deletions cranelift/filetests/filetests/isa/x64/fabs.clif
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Expand Up @@ -13,7 +13,7 @@ block0(v0: f32):
; block0:
; movl $2147483647, %eax
; movd %eax, %xmm4
; andps %xmm0, %xmm4, %xmm0
; andps %xmm4, %xmm0
; movq %rbp, %rsp
; popq %rbp
; ret
Expand Down Expand Up @@ -42,7 +42,7 @@ block0(v0: f64):
; block0:
; movabsq $9223372036854775807, %rax
; movq %rax, %xmm4
; andpd %xmm0, %xmm4, %xmm0
; andpd %xmm4, %xmm0
; movq %rbp, %rsp
; popq %rbp
; ret
Expand Down Expand Up @@ -72,7 +72,7 @@ block0(v0: f32x4):
; uninit %xmm4
; pcmpeqd %xmm4, %xmm4, %xmm4
; psrld %xmm4, $1, %xmm4
; andps %xmm0, %xmm4, %xmm0
; andps %xmm4, %xmm0
; movq %rbp, %rsp
; popq %rbp
; ret
Expand Down Expand Up @@ -102,7 +102,7 @@ block0(v0: f64x2):
; uninit %xmm4
; pcmpeqd %xmm4, %xmm4, %xmm4
; psrlq %xmm4, $1, %xmm4
; andpd %xmm0, %xmm4, %xmm0
; andpd %xmm4, %xmm0
; movq %rbp, %rsp
; popq %rbp
; ret
Expand Down
2 changes: 1 addition & 1 deletion cranelift/filetests/filetests/isa/x64/fastcall.clif
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Expand Up @@ -241,7 +241,7 @@ block0(v0: i64):
; subq %rsp, $48, %rsp
; block0:
; uninit %xmm3
; xorpd %xmm3, %xmm3, %xmm3
; xorpd %xmm3, %xmm3
; cvtsi2sd %xmm3, %rcx, %xmm3
; movq %rcx, 32(%rsp)
; movq %rcx, 40(%rsp)
Expand Down
6 changes: 3 additions & 3 deletions cranelift/filetests/filetests/isa/x64/fcopysign.clif
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Expand Up @@ -16,8 +16,8 @@ block0(v0: f32, v1: f32):
; movdqa %xmm0, %xmm2
; movdqa %xmm7, %xmm0
; andnps %xmm0, %xmm2, %xmm0
; andps %xmm7, %xmm1, %xmm7
; orps %xmm0, %xmm7, %xmm0
; andps %xmm1, %xmm7
; orps %xmm7, %xmm0
; movq %rbp, %rsp
; popq %rbp
; ret
Expand Down Expand Up @@ -53,7 +53,7 @@ block0(v0: f64, v1: f64):
; movdqa %xmm0, %xmm2
; movdqa %xmm7, %xmm0
; andnpd %xmm0, %xmm2, %xmm0
; andpd %xmm7, %xmm1, %xmm7
; andpd %xmm1, %xmm7
; orpd %xmm7, %xmm0
; movq %rbp, %rsp
; popq %rbp
Expand Down
40 changes: 20 additions & 20 deletions cranelift/filetests/filetests/isa/x64/fcvt.clif
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Expand Up @@ -12,7 +12,7 @@ block0(v0: i8):
; movq %rsp, %rbp
; block0:
; uninit %xmm0
; xorps %xmm0, %xmm0, %xmm0
; xorps %xmm0, %xmm0
; movsbl %dil, %r9d
; cvtsi2ss %xmm0, %r9d, %xmm0
; movq %rbp, %rsp
Expand Down Expand Up @@ -42,7 +42,7 @@ block0(v0: i16):
; movq %rsp, %rbp
; block0:
; uninit %xmm0
; xorps %xmm0, %xmm0, %xmm0
; xorps %xmm0, %xmm0
; movswl %di, %r9d
; cvtsi2ss %xmm0, %r9d, %xmm0
; movq %rbp, %rsp
Expand Down Expand Up @@ -72,7 +72,7 @@ block0(v0: i32):
; movq %rsp, %rbp
; block0:
; uninit %xmm0
; xorps %xmm0, %xmm0, %xmm0
; xorps %xmm0, %xmm0
; cvtsi2ss %xmm0, %edi, %xmm0
; movq %rbp, %rsp
; popq %rbp
Expand Down Expand Up @@ -100,7 +100,7 @@ block0(v0: i64):
; movq %rsp, %rbp
; block0:
; uninit %xmm0
; xorps %xmm0, %xmm0, %xmm0
; xorps %xmm0, %xmm0
; cvtsi2ss %xmm0, %rdi, %xmm0
; movq %rbp, %rsp
; popq %rbp
Expand Down Expand Up @@ -128,7 +128,7 @@ block0(v0: i8):
; movq %rsp, %rbp
; block0:
; uninit %xmm0
; xorpd %xmm0, %xmm0, %xmm0
; xorpd %xmm0, %xmm0
; movsbl %dil, %r9d
; cvtsi2sd %xmm0, %r9d, %xmm0
; movq %rbp, %rsp
Expand Down Expand Up @@ -158,7 +158,7 @@ block0(v0: i16):
; movq %rsp, %rbp
; block0:
; uninit %xmm0
; xorpd %xmm0, %xmm0, %xmm0
; xorpd %xmm0, %xmm0
; movswl %di, %r9d
; cvtsi2sd %xmm0, %r9d, %xmm0
; movq %rbp, %rsp
Expand Down Expand Up @@ -188,7 +188,7 @@ block0(v0: i32):
; movq %rsp, %rbp
; block0:
; uninit %xmm0
; xorpd %xmm0, %xmm0, %xmm0
; xorpd %xmm0, %xmm0
; cvtsi2sd %xmm0, %edi, %xmm0
; movq %rbp, %rsp
; popq %rbp
Expand Down Expand Up @@ -216,7 +216,7 @@ block0(v0: i64):
; movq %rsp, %rbp
; block0:
; uninit %xmm0
; xorpd %xmm0, %xmm0, %xmm0
; xorpd %xmm0, %xmm0
; cvtsi2sd %xmm0, %rdi, %xmm0
; movq %rbp, %rsp
; popq %rbp
Expand Down Expand Up @@ -276,15 +276,15 @@ block0(v0: i8, v1: i16, v2: i32, v3: i64):
; movq %rsp, %rbp
; block0:
; uninit %xmm0
; xorps %xmm0, %xmm0, %xmm0
; xorps %xmm0, %xmm0
; movzbq %dil, %r8
; cvtsi2ss %xmm0, %r8, %xmm0
; uninit %xmm6
; xorps %xmm6, %xmm6, %xmm6
; xorps %xmm6, %xmm6
; movzwq %si, %r8
; cvtsi2ss %xmm6, %r8, %xmm6
; uninit %xmm7
; xorps %xmm7, %xmm7, %xmm7
; xorps %xmm7, %xmm7
; movl %edx, %r8d
; cvtsi2ss %xmm7, %r8, %xmm7
; u64_to_f32_seq %rcx, %xmm4, %r8, %rdx
Expand Down Expand Up @@ -339,7 +339,7 @@ block0(v0: i32x4):
; movq %rsp, %rbp
; block0:
; unpcklps %xmm0, const(0), %xmm0
; subpd %xmm0, const(1), %xmm0
; subpd (%rip), %xmm0
; movq %rbp, %rsp
; popq %rbp
; ret
Expand Down Expand Up @@ -390,8 +390,8 @@ block0(v0: i32x4):
; cvtdq2ps %xmm3, %xmm1
; psrld %xmm0, $1, %xmm0
; cvtdq2ps %xmm0, %xmm0
; addps %xmm0, %xmm0, %xmm0
; addps %xmm0, %xmm1, %xmm0
; addps %xmm0, %xmm0
; addps %xmm1, %xmm0
; movq %rbp, %rsp
; popq %rbp
; ret
Expand Down Expand Up @@ -1065,13 +1065,13 @@ block0(v0: f32x4):
; movq %rsp, %rbp
; block0:
; uninit %xmm6
; xorps %xmm6, %xmm6, %xmm6
; xorps %xmm6, %xmm6
; maxps %xmm0, %xmm6, %xmm0
; pcmpeqd %xmm6, %xmm6, %xmm6
; psrld %xmm6, $1, %xmm6
; cvtdq2ps %xmm6, %xmm7
; cvttps2dq %xmm0, %xmm6
; subps %xmm0, %xmm7, %xmm0
; subps %xmm7, %xmm0
; cmpps $2, %xmm7, %xmm0, %xmm7
; cvttps2dq %xmm0, %xmm0
; pxor %xmm0, %xmm7, %xmm0
Expand Down Expand Up @@ -1117,7 +1117,7 @@ block0(v0: f32x4):
; block0:
; movdqa %xmm0, %xmm4
; cmpps $0, %xmm4, %xmm0, %xmm4
; andps %xmm0, %xmm4, %xmm0
; andps %xmm4, %xmm0
; pxor %xmm4, %xmm0, %xmm4
; cvttps2dq %xmm0, %xmm1
; movdqa %xmm1, %xmm0
Expand Down Expand Up @@ -1163,10 +1163,10 @@ block0(v0: i64x2):
; movdqa %xmm1, %xmm7
; psrlq %xmm0, $32, %xmm0
; por %xmm0, const(2), %xmm0
; subpd %xmm0, const(3), %xmm0
; subpd (%rip), %xmm0
; movdqa %xmm0, %xmm1
; movdqa %xmm7, %xmm0
; addpd %xmm0, %xmm1, %xmm0
; addpd %xmm1, %xmm0
; movq %rbp, %rsp
; popq %rbp
; ret
Expand Down Expand Up @@ -1207,7 +1207,7 @@ block0(v0: i64x2):
; movq %rsp, %rbp
; block0:
; uninit %xmm1
; xorpd %xmm1, %xmm1, %xmm1
; xorpd %xmm1, %xmm1
; movdqa %xmm0, %xmm6
; movq %xmm6, %r9
; movdqa %xmm1, %xmm0
Expand Down
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