asm: notate instruction alignment, SSE feature flags#10446
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abrown merged 2 commits intobytecodealliance:mainfrom Mar 24, 2025
Merged
asm: notate instruction alignment, SSE feature flags#10446abrown merged 2 commits intobytecodealliance:mainfrom
abrown merged 2 commits intobytecodealliance:mainfrom
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This change improves the definitions of the assembler's SSE instructions in two ways: - vector instructions that require aligned memory accesses (i.e., most everything pre-AVX) are now noted with an `align` attribute in the AST. This is used for generating the expected `XmmMemAligned` types in `cranelift-codegen-meta` the "right way," resolving the temporary fix introduced in bytecodealliance#10417. - previously-added vector instructions did not have the correct feature flags; this change adds the `sse` feature and also tags the applicable instructions with the `compat` feature to allow their use in some future 32-bit target.
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This change improves the definitions of the assembler's SSE instructions in two ways:
alignattribute in the AST. This is used for generating the expectedXmmMemAlignedtypes incranelift-codegen-metathe "right way," resolving the temporary fix introduced in x64: fix misaligned load fault with sunk load when AVX is disabled #10417.ssefeature and also tags the applicable instructions with thecompatfeature to allow their use in some future 32-bit target.