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Cranelift: Fix ABIMachineSpec::gen_add_imm for riscv64 #6780

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Merged
fitzgen merged 1 commit into from
Jul 27, 2023
Merged

Cranelift: Fix ABIMachineSpec::gen_add_imm for riscv64 #6780

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2 changes: 1 addition & 1 deletion cranelift/codegen/src/isa/riscv64/abi.rs
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Original file line number Diff line number Diff line change
Expand Up @@ -275,7 +275,7 @@ impl ABIMachineSpec for Riscv64MachineDeps {
let mut insts = SmallInstVec::new();
if let Some(imm12) = Imm12::maybe_from_u64(imm as u64) {
insts.push(Inst::AluRRImm12 {
alu_op: AluOPRRI::Andi,
alu_op: AluOPRRI::Addi,
rd: into_reg,
rs: from_reg,
imm12,
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5 changes: 1 addition & 4 deletions cranelift/codegen/src/isa/riscv64/inst/emit.rs
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Original file line number Diff line number Diff line change
Expand Up @@ -1996,10 +1996,7 @@ impl MachInstEmit for Inst {
.emit(&[], sink, emit_info, state);
// trap
sink.bind_label(label_trap, &mut state.ctrl_plane);
Inst::Udf {
trap_code: trap_code,
}
.emit(&[], sink, emit_info, state);
Inst::Udf { trap_code }.emit(&[], sink, emit_info, state);
sink.bind_label(label_jump_over, &mut state.ctrl_plane);
}
&Inst::TrapIf { test, trap_code } => {
Expand Down
12 changes: 6 additions & 6 deletions cranelift/filetests/filetests/isa/riscv64/stack-limit.clif
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Expand Up @@ -147,7 +147,7 @@ block0(v0: i64):
; sd ra,8(sp)
; sd fp,0(sp)
; mv fp,sp
; andi t6,a0,176
; addi t6,a0,176
; trap_ifc stk_ovf##(sp ult t6)
; add sp,-176
; block0:
Expand All @@ -163,7 +163,7 @@ block0(v0: i64):
; sd ra, 8(sp)
; sd s0, 0(sp)
; ori s0, sp, 0
; andi t6, a0, 0xb0
; addi t6, a0, 0xb0
; bgeu sp, t6, 8
; .byte 0x00, 0x00, 0x00, 0x00 ; trap: stk_ovf
; addi sp, sp, -0xb0
Expand Down Expand Up @@ -251,7 +251,7 @@ block0(v0: i64):
; mv fp,sp
; ld t6,0(a0)
; ld t6,4(t6)
; andi t6,t6,32
; addi t6,t6,32
; trap_ifc stk_ovf##(sp ult t6)
; add sp,-32
; block0:
Expand All @@ -269,7 +269,7 @@ block0(v0: i64):
; ori s0, sp, 0
; ld t6, 0(a0)
; ld t6, 4(t6)
; andi t6, t6, 0x20
; addi t6, t6, 0x20
; bgeu sp, t6, 8
; .byte 0x00, 0x00, 0x00, 0x00 ; trap: stk_ovf
; addi sp, sp, -0x20
Expand Down Expand Up @@ -363,7 +363,7 @@ block0(v0: i64):
; sd fp,0(sp)
; mv fp,sp
; ld t6,400000(a0)
; andi t6,t6,32
; addi t6,t6,32
; trap_ifc stk_ovf##(sp ult t6)
; add sp,-32
; block0:
Expand All @@ -386,7 +386,7 @@ block0(v0: i64):
; .byte 0x00, 0x00, 0x00, 0x00
; add t6, t6, a0
; ld t6, 0(t6)
; andi t6, t6, 0x20
; addi t6, t6, 0x20
; bgeu sp, t6, 8
; .byte 0x00, 0x00, 0x00, 0x00 ; trap: stk_ovf
; addi sp, sp, -0x20
Expand Down