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Constify backends#1502

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rth7680 wants to merge 19 commits intocapstone-engine:nextfrom
rth7680:constify
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Constify backends#1502
rth7680 wants to merge 19 commits intocapstone-engine:nextfrom
rth7680:constify

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@rth7680
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@rth7680 rth7680 commented May 30, 2019

Reduces the size of .data from 500k to 288 bytes.
Unlike the previous pull vs master, I've made modifications to suite/synctools/ to add (or not remove) the const markup. Where possible I have regenerated the affected files from LLVM 7.0.1. In other cases that produced non-working output, possibly indicating that synctools has not been adjusted to work with that arch, so I made the changes by hand. As far as I can see, none of the by-hand changes are not also reflected in the python scripts, for when those arches do get regenerated.

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aquynh commented May 31, 2019

nice work!

please fix the errors reported by CI.

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rth7680 commented Jun 4, 2019

Ok, I believe I've fixed this by not re-generating the ARM inc files. Presumably that update was incomplete. I was not able to build suite/cstest, but Travis can and it appears to have succeeded.

Comment thread arch/PowerPC/PPCGenInstrInfo.inc Outdated
@@ -4050,18 +4050,18 @@ static const MCInstrDesc PPCInsts[] = {
{ 1, OperandInfo2 },
{ 0, nullptr },
{ 0, nullptr },
{ 1, OperandInfo2 },
{ 2, OperandInfo249 },
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why does this PR modify this array?

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i suppose this is because you run the syntool script on PPC td files?

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Yes. I was able to use the sync scripts for a few of the backends, but not all.

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can you restore these parts (so this PR just focuses on adding const), so i can merge this first, and then we will come back to that later?

Remove two conditionals separating identical bits of code.
Add "const" markup to MCRegisterDesc and MCRegisterClass.

Signed-off-by: Richard Henderson <rth@twiddle.net>
In this case, do not actively strip const.

Signed-off-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Richard Henderson <rth@twiddle.net>
The Mips backend has not been regenerated from LLVM recently,
and there are more fixups required than I'd like.  Just apply
the fixes to the tables by hand for now.

Signed-off-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Richard Henderson <rth@twiddle.net>
The mapping of system register to indexes is easy to
generate read-only.  Since we know the indexes are
between 0 and 31, use uint8_t instead of unsigned.

Signed-off-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Richard Henderson <rth@twiddle.net>
@rth7680 rth7680 closed this Oct 14, 2019
@rth7680 rth7680 deleted the constify branch October 14, 2019 23:04
@rth7680 rth7680 restored the constify branch October 14, 2019 23:04
@rth7680 rth7680 mentioned this pull request Oct 15, 2019
@rth7680 rth7680 deleted the constify branch December 28, 2019 02:09
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2 participants