capstone-engine · peace-maker · Jul 13, 2023 · Jul 13, 2023 · Jul 13, 2023 · Jul 13, 2023
diff --git a/.github/workflows/CITest.yml b/.github/workflows/CITest.yml
@@ -86,7 +86,7 @@ jobs:
         ./make.sh;
         make check;
         cp libcapstone.so.5 libcapstone.so.5.0
-        # sudo make install
+        sudo make install
 
     - name: cmake
       if: startsWith(matrix.config.build-system, 'cmake')
@@ -96,7 +96,9 @@ jobs:
         cmake -DCAPSTONE_INSTALL=1 -DBUILD_SHARED_LIBS=1 ..;
         cmake --build . --config Release;
         cp libcapstone.* ../;
-        # sudo make install;
+        cp libcapstone.* ../tests/;
+        cp test_* ../tests/;
+        sudo make install;
 
     - name: build python binding
       shell: 'script -q -e -c "bash {0}"'
@@ -106,6 +108,22 @@ jobs:
         make && make check ; 
         cd ../..;
 
+    - name: run python binding test
+      run: |
+        cd bindings/python
+        make install3
+        cd ..
+        BUILD_TESTS=no make tests
+
+    - name: run cython binding test
+      run: |
+        pip install cython
+        cd bindings/python
+        make install3_cython
+        cd ..
+        python -c "import capstone;print(capstone.debug())" | grep Cython
+        BUILD_TESTS=no make tests
+
     - name: cstest
       shell: 'script -q -e -c "bash {0}"'
       run: |

diff --git a/.gitignore b/.gitignore
@@ -73,6 +73,7 @@ tests/test_wasm
 tests/test_mos65xx
 tests/test_bpf
 tests/test_riscv
+tests/test_sh
 
 # regress binaries
 suite/regress/invalid_read_in_print_operand

diff --git a/bindings/Makefile b/bindings/Makefile
@@ -2,7 +2,9 @@ TMPDIR = /tmp/capstone_test
 
 DIFF = diff -u -w
 
-TEST = $(TMPDIR)/test
+TEST_BASIC = $(TMPDIR)/test_basic
+TEST_DETAIL = $(TMPDIR)/test_detail
+TEST_CUSTOMIZED_MNEM = $(TMPDIR)/test_customized_mnem
 TEST_ARM = $(TMPDIR)/test_arm
 TEST_ARM64 = $(TMPDIR)/test_arm64
 TEST_M68K = $(TMPDIR)/test_m68k
@@ -13,27 +15,37 @@ TEST_SPARC = $(TMPDIR)/test_sparc
 TEST_SYSZ = $(TMPDIR)/test_systemz
 TEST_X86 = $(TMPDIR)/test_x86
 TEST_XCORE = $(TMPDIR)/test_xcore
+TEST_WASM = $(TMPDIR)/test_wasm
 TEST_BPF = $(TMPDIR)/test_bpf
 TEST_RISCV = $(TMPDIR)/test_riscv
+TEST_EVM = $(TMPDIR)/test_evm
+TEST_M680X = $(TMPDIR)/test_m680x
+TEST_TRICORE = $(TMPDIR)/test_tricore
+TEST_SH = $(TMPDIR)/test_sh
+TEST_TMS320C64X = $(TMPDIR)/test_tms320c64x
 
 PYTHON2 ?= python
 
+BUILD_TESTS ?= yes
+
 .PHONY: all expected python java ocaml
 
 all:
 	cd python && $(MAKE) gen_const
 	cd java && $(MAKE) gen_const
 	cd ocaml && $(MAKE) gen_const
 
-tests: expected python java #oclma ruby
+tests: expected python #java oclma ruby
 
 test_java: expected java
 test_python: expected python
 
 expected:
-	cd ../tests && $(MAKE)
+	if [ "$(BUILD_TESTS)" = "yes" ]; then cd ../tests && $(MAKE); fi
 	mkdir -p $(TMPDIR)
-	../tests/test > $(TEST)_e
+	../tests/test_basic > $(TEST_BASIC)_e
+	../tests/test_detail > $(TEST_DETAIL)_e
+	../tests/test_customized_mnem > $(TEST_CUSTOMIZED_MNEM)_e
 	../tests/test_arm > $(TEST_ARM)_e
 	../tests/test_arm64 > $(TEST_ARM64)_e
 	../tests/test_m68k > $(TEST_M68K)_e
@@ -44,12 +56,20 @@ expected:
 	../tests/test_systemz > $(TEST_SYSZ)_e
 	../tests/test_x86 > $(TEST_X86)_e
 	../tests/test_xcore > $(TEST_XCORE)_e
+	../tests/test_wasm > $(TEST_WASM)_e
 	../tests/test_bpf > $(TEST_BPF)_e
 	../tests/test_riscv > $(TEST_RISCV)_e
+	../tests/test_evm > $(TEST_EVM)_e
+	../tests/test_m680x > $(TEST_M680X)_e
+	../tests/test_sh > $(TEST_SH)_e
+	../tests/test_tricore > $(TEST_TRICORE)_e
+	../tests/test_tms320c64x > $(TEST_TMS320C64X)_e
 
 python: FORCE
 	cd python && $(MAKE)
-	$(PYTHON2) python/test.py > $(TEST)_o
+	$(PYTHON2) python/test_basic.py > $(TEST_BASIC)_o
+	$(PYTHON2) python/test_detail.py > $(TEST_DETAIL)_o
+	$(PYTHON2) python/test_customized_mnem.py > $(TEST_CUSTOMIZED_MNEM)_o
 	$(PYTHON2) python/test_arm.py > $(TEST_ARM)_o
 	$(PYTHON2) python/test_arm64.py > $(TEST_ARM64)_o
 	$(PYTHON2) python/test_m68k.py > $(TEST_M68K)_o
@@ -60,13 +80,19 @@ python: FORCE
 	$(PYTHON2) python/test_systemz.py > $(TEST_SYSZ)_o
 	$(PYTHON2) python/test_x86.py > $(TEST_X86)_o
 	$(PYTHON2) python/test_xcore.py > $(TEST_XCORE)_o
+	$(PYTHON2) python/test_wasm.py > $(TEST_WASM)_o
 	$(PYTHON2) python/test_bpf.py > $(TEST_BPF)_o
 	$(PYTHON2) python/test_riscv.py > $(TEST_RISCV)_o
+	$(PYTHON2) python/test_evm.py > $(TEST_EVM)_o
+	$(PYTHON2) python/test_m680x.py > $(TEST_M680X)_o
+	$(PYTHON2) python/test_sh.py > $(TEST_SH)_o
+	$(PYTHON2) python/test_tricore.py > $(TEST_TRICORE)_o
+	$(PYTHON2) python/test_tms320c64x.py > $(TEST_TMS320C64X)_o
 	$(MAKE) test_diff
 
 java: FORCE
 	cd java && $(MAKE)
-	cd java && ./run.sh > $(TEST)_o
+	cd java && ./run.sh > $(TEST_BASIC)_o
 	cd java && ./run.sh arm > $(TEST_ARM)_o
 	cd java && ./run.sh arm64 > $(TEST_ARM64)_o
 	cd java && ./run.sh mips > $(TEST_MIPS)_o
@@ -80,7 +106,9 @@ java: FORCE
 ocaml: FORCE
 
 test_diff: FORCE
-	$(DIFF) $(TEST)_e $(TEST)_o
+	$(DIFF) $(TEST_BASIC)_e $(TEST_BASIC)_o
+	$(DIFF) $(TEST_DETAIL)_e $(TEST_DETAIL)_o
+	$(DIFF) $(TEST_CUSTOMIZED_MNEM)_e $(TEST_CUSTOMIZED_MNEM)_o
 	$(DIFF) $(TEST_ARM)_e $(TEST_ARM)_o
 	$(DIFF) $(TEST_ARM64)_e $(TEST_ARM64)_o
 	$(DIFF) $(TEST_M68K)_e $(TEST_M68K)_o
@@ -91,7 +119,14 @@ test_diff: FORCE
 	$(DIFF) $(TEST_SYSZ)_e $(TEST_SYSZ)_o
 	$(DIFF) $(TEST_X86)_e $(TEST_X86)_o
 	$(DIFF) $(TEST_XCORE)_e $(TEST_XCORE)_o
+	$(DIFF) $(TEST_WASM)_e $(TEST_WASM)_o
 	$(DIFF) $(TEST_BPF)_e $(TEST_BPF)_o
+	$(DIFF) $(TEST_RISCV)_e $(TEST_RISCV)_o
+	$(DIFF) $(TEST_EVM)_e $(TEST_EVM)_o
+	$(DIFF) $(TEST_M680X)_e $(TEST_M680X)_o
+	$(DIFF) $(TEST_SH)_e $(TEST_SH)_o
+	$(DIFF) $(TEST_TRICORE)_e $(TEST_TRICORE)_o
+	$(DIFF) $(TEST_TMS320C64X)_e $(TEST_TMS320C64X)_o
 
 clean:
 	rm -rf $(TMPDIR)

diff --git a/bindings/const_generator.py b/bindings/const_generator.py
@@ -5,7 +5,7 @@
 
 INCL_DIR = '../include/capstone/'
 
-include = [ 'arm.h', 'arm64.h', 'm68k.h', 'mips.h', 'x86.h', 'ppc.h', 'sparc.h', 'systemz.h', 'xcore.h', 'tms320c64x.h', 'm680x.h', 'evm.h', 'mos65xx.h', 'wasm.h', 'bpf.h' ,'riscv.h', 'tricore.h' ]
+include = [ 'arm.h', 'arm64.h', 'm68k.h', 'mips.h', 'x86.h', 'ppc.h', 'sparc.h', 'systemz.h', 'xcore.h', 'tms320c64x.h', 'm680x.h', 'evm.h', 'mos65xx.h', 'wasm.h', 'bpf.h' ,'riscv.h', 'sh.h', 'tricore.h' ]
 
 template = {
     'java': {
@@ -53,6 +53,7 @@
             'mos65xx.h': 'mos65xx',
             'bpf.h': 'bpf',
             'riscv.h': 'riscv',
+            'sh.h': 'sh',
             'tricore.h': ['TRICORE', 'TriCore'],
             'comment_open': '#',
             'comment_close': '',

diff --git a/bindings/python/Makefile b/bindings/python/Makefile
@@ -4,7 +4,7 @@ PYTHON3 ?= python3
 .PHONY: gen_const install install3 install_cython sdist sdist3 bdist bdist3 clean check
 
 gen_const:
-	cd .. && $(PYTHON2) const_generator.py python
+	cd .. && $(PYTHON3) const_generator.py python
 
 install:
 	rm -rf src/
@@ -71,7 +71,8 @@ clean:
 TESTS = test_basic.py test_detail.py test_arm.py test_arm64.py test_m68k.py test_mips.py
 TESTS += test_ppc.py test_sparc.py test_systemz.py test_x86.py test_xcore.py test_tms320c64x.py
 TESTS += test_m680x.py test_skipdata.py test_mos65xx.py test_bpf.py test_riscv.py
-TESTS += test_evm.py
+TESTS += test_evm.py test_tricore.py test_lite.py test_customized_mnem.py
+TESTS += test_wasm.py test_sh.py
 
 check:
 	@for t in $(TESTS); do \

diff --git a/bindings/python/capstone/__init__.py b/bindings/python/capstone/__init__.py
@@ -35,9 +35,11 @@
     'CS_ARCH_TMS320C64X',
     'CS_ARCH_M680X',
     'CS_ARCH_EVM',
+    'CS_ARCH_MOS65XX',
+    'CS_ARCH_WASM',
     'CS_ARCH_BPF',
     'CS_ARCH_RISCV',
-    'CS_ARCH_MOS65XX',
+    'CS_ARCH_SH',
     'CS_ARCH_TRICORE',
     'CS_ARCH_ALL',
 
@@ -89,6 +91,13 @@
     'CS_MODE_MOS65XX_65816_LONG_M',
     'CS_MODE_MOS65XX_65816_LONG_X',
     'CS_MODE_MOS65XX_65816_LONG_MX',
+    'CS_MODE_SH2',
+    'CS_MODE_SH2A',
+    'CS_MODE_SH3',
+    'CS_MODE_SH4',
+    'CS_MODE_SH4A',
+    'CS_MODE_SHFPU',
+    'CS_MODE_SHDSP',
     'CS_MODE_TRICORE_110',
     'CS_MODE_TRICORE_120',
     'CS_MODE_TRICORE_130',
@@ -110,7 +119,13 @@
     'CS_OPT_ON',
     'CS_OPT_OFF',
 
+    'CS_OPT_INVALID',
     'CS_OPT_MEM',
+    'CS_OPT_SKIPDATA',
+    'CS_OPT_SKIPDATA_SETUP',
+    'CS_OPT_MNEMONIC',
+    'CS_OPT_UNSIGNED',
+    'CS_OPT_NO_BRANCH_OFFSET',
 
     'CS_ERR_OK',
     'CS_ERR_MEM',
@@ -126,6 +141,7 @@
     'CS_ERR_SKIPDATA',
     'CS_ERR_X86_ATT',
     'CS_ERR_X86_INTEL',
+    'CS_ERR_X86_MASM',
 
     'CS_SUPPORT_DIET',
     'CS_SUPPORT_X86_REDUCE',
@@ -134,8 +150,8 @@
     'CS_OP_INVALID',
     'CS_OP_REG',
     'CS_OP_IMM',
-    'CS_OP_MEM',
     'CS_OP_FP',
+    'CS_OP_MEM',
 
     'CS_GRP_INVALID',
     'CS_GRP_JUMP',
@@ -185,7 +201,7 @@
 CS_ARCH_WASM = 13
 CS_ARCH_BPF = 14
 CS_ARCH_RISCV = 15
-# CS_ARCH_SH = 16
+CS_ARCH_SH = 16
 CS_ARCH_TRICORE = 17
 CS_ARCH_MAX = 18
 CS_ARCH_ALL = 0xFFFF
@@ -239,6 +255,13 @@
 CS_MODE_MOS65XX_65816_LONG_M = (1 << 5) # MOS65XXX WDC 65816, 16-bit m, 8-bit x 
 CS_MODE_MOS65XX_65816_LONG_X = (1 << 6) # MOS65XXX WDC 65816, 8-bit m, 16-bit x
 CS_MODE_MOS65XX_65816_LONG_MX = CS_MODE_MOS65XX_65816_LONG_M | CS_MODE_MOS65XX_65816_LONG_X
+CS_MODE_SH2 = 1 << 1   # SH2
+CS_MODE_SH2A = 1 << 2  # SH2A
+CS_MODE_SH3 = 1 << 3   # SH3
+CS_MODE_SH4 = 1 << 4   # SH4
+CS_MODE_SH4A = 1 << 5  # SH4A
+CS_MODE_SHFPU = 1 << 6 # w/ FPU
+CS_MODE_SHDSP = 1 << 7 # w/ DSP
 CS_MODE_TRICORE_110 = 1 << 1 # Tricore 1.1
 CS_MODE_TRICORE_120 = 1 << 2 # Tricore 1.2
 CS_MODE_TRICORE_130 = 1 << 3 # Tricore 1.3
@@ -248,6 +271,7 @@
 CS_MODE_TRICORE_162 = 1 << 7 # Tricore 1.6.2
 
 # Capstone option type
+CS_OPT_INVALID = 0   # No option specified
 CS_OPT_SYNTAX = 1    # Intel X86 asm syntax (CS_ARCH_X86 arch)
 CS_OPT_DETAIL = 2    # Break down instruction structure into details
 CS_OPT_MODE = 3      # Change engine's mode at run-time
@@ -256,17 +280,18 @@
 CS_OPT_SKIPDATA_SETUP = 6      # Setup user-defined function for SKIPDATA option
 CS_OPT_MNEMONIC = 7  # Customize instruction mnemonic
 CS_OPT_UNSIGNED = 8  # Print immediate in unsigned form
+CS_OPT_NO_BRANCH_OFFSET = 9  # ARM, prints branch immediates without offset.
 
 # Capstone option value
 CS_OPT_OFF = 0             # Turn OFF an option - default option of CS_OPT_DETAIL
 CS_OPT_ON = 3              # Turn ON an option (CS_OPT_DETAIL)
 
 # Common instruction operand types - to be consistent across all architectures.
-CS_OP_INVALID = 0
-CS_OP_REG = 1
-CS_OP_IMM = 2
-CS_OP_MEM = 3
-CS_OP_FP  = 4
+CS_OP_INVALID = 0  # uninitialized/invalid operand.
+CS_OP_REG = 1  # Register operand.
+CS_OP_IMM = 2  # Immediate operand.
+CS_OP_FP  = 3  # Floating-Point operand.
+CS_OP_MEM = 0x80  # Memory operand. Can be ORed with another operand type.
 
 # Common instruction groups - to be consistent across all architectures.
 CS_GRP_INVALID = 0  # uninitialized/invalid group.
@@ -387,7 +412,7 @@ def copy_ctypes_list(src):
     return [copy_ctypes(n) for n in src]
 
 # Weird import placement because these modules are needed by the below code but need the above functions
-from . import arm, arm64, m68k, mips, ppc, sparc, systemz, x86, xcore, tms320c64x, m680x, evm, mos65xx, bpf, riscv, tricore
+from . import arm, arm64, m68k, mips, ppc, sparc, systemz, x86, xcore, tms320c64x, m680x, evm, mos65xx, wasm, bpf, riscv, sh, tricore
 
 class _cs_arch(ctypes.Union):
     _fields_ = (
@@ -404,8 +429,10 @@ class _cs_arch(ctypes.Union):
         ('m680x', m680x.CsM680x),
         ('evm', evm.CsEvm),
         ('mos65xx', mos65xx.CsMOS65xx),
+        ('wasm', wasm.CsWasm),
         ('bpf', bpf.CsBPF),
         ('riscv', riscv.CsRISCV),
+        ('sh', sh.CsSH),
         ('tricore', tricore.CsTriCore),
     )
 
@@ -703,7 +730,7 @@ def __gen_detail(self):
             (self.prefix, self.opcode, self.rex, self.addr_size, \
                 self.modrm, self.sib, self.disp, \
                 self.sib_index, self.sib_scale, self.sib_base, self.xop_cc, self.sse_cc, \
-                self.avx_cc, self.avx_sae, self.avx_rm, self.eflags, \
+                self.avx_cc, self.avx_sae, self.avx_rm, self.eflags, self.fpu_flags, \
                 self.encoding, self.modrm_offset, self.disp_offset, self.disp_size, self.imm_offset, self.imm_size, \
                 self.operands) = x86.get_arch_info(self._raw.detail.contents.arch.x86)
         elif arch == CS_ARCH_M68K:
@@ -727,10 +754,14 @@ def __gen_detail(self):
             (self.pop, self.push, self.fee) = evm.get_arch_info(self._raw.detail.contents.arch.evm)
         elif arch == CS_ARCH_MOS65XX:
             (self.am, self.modifies_flags, self.operands) = mos65xx.get_arch_info(self._raw.detail.contents.arch.mos65xx)
+        elif arch == CS_ARCH_WASM:
+            (self.operands) = wasm.get_arch_info(self._raw.detail.contents.arch.wasm)
         elif arch == CS_ARCH_BPF:
             (self.operands) = bpf.get_arch_info(self._raw.detail.contents.arch.bpf)
         elif arch == CS_ARCH_RISCV:
             (self.need_effective_addr, self.operands) = riscv.get_arch_info(self._raw.detail.contents.arch.riscv)
+        elif arch == CS_ARCH_SH:
+            (self.sh_insn, self.sh_size, self.operands) = sh.get_arch_info(self._raw.detail.contents.arch.sh)
         elif arch == CS_ARCH_TRICORE:
             (self.update_flags, self.operands) = tricore.get_arch_info(self._raw.detail.contents.arch.tricore)
 
@@ -1199,6 +1230,7 @@ def debug():
         "sysz": CS_ARCH_SYSZ, 'xcore': CS_ARCH_XCORE, "tms320c64x": CS_ARCH_TMS320C64X,
         "m680x": CS_ARCH_M680X, 'evm': CS_ARCH_EVM, 'mos65xx': CS_ARCH_MOS65XX,
         'bpf': CS_ARCH_BPF, 'riscv': CS_ARCH_RISCV, 'tricore': CS_ARCH_TRICORE,
+        'wasm': CS_ARCH_WASM, 'sh': CS_ARCH_SH,
     }
 
     all_archs = ""

diff --git a/bindings/python/capstone/m68k.py b/bindings/python/capstone/m68k.py
@@ -66,6 +66,10 @@ def simm(self):
     @property
     def reg(self):
         return self.value.reg
+
+    @property
+    def reg_pair(self):
+        return self.value.reg_pair
 
     @property
     def mem(self):

diff --git a/bindings/python/capstone/mos65xx.py b/bindings/python/capstone/mos65xx.py
@@ -8,8 +8,8 @@
 class MOS65xxOpValue(ctypes.Union):
     _fields_ = (
         ('reg', ctypes.c_uint),
-        ('imm', ctypes.c_uint8),
-        ('mem', ctypes.c_uint16),
+        ('imm', ctypes.c_uint16),
+        ('mem', ctypes.c_uint32),
     )
 
 class MOS65xxOp(ctypes.Structure):