[RyuJIT] Fix VEX.vvvv for cvtss2sd and cvtsd2ss

[fiigii]

Instruction cvtss2sd and cvtsd2ss has similar issue to #14225, which vcvtsd2ss xmm0, xmm1, xmm1 has less register dependency than vcvtsd2ss xmm0, xmm0, xmm1.

[fiigii]

@CarolEidt @BruceForstall PTAL

[CarolEidt]

In looking at these a bit more (wondering why your previous change that included cvtsi2sd and cvtsi2ss in the DstSrcSrc category wasn't correct), it seems to me that only cvtss2si should remain in the DstDstSrc, and that cvtss2sd should be also moved to DstSrcSrc, as it has a 3-operand form that merges. Am I missing something?

[fiigii]

@CarolEidt These two instructions were omitted in the previous PR. cvtsi2ss/d is different from cvtss2sd and cvtsd2ss.
In VEX-encoding format, vcvtsi2ss/d has different types on the second and the third operand: vcvtsi2ss xmm0, xmm0, rax, so we cannot eliminate the register dependency from the second operand xmm0.
However, cvtss2sd and cvtsd2ss has the same type on the second and the third operand: vcvtss2sd xmm0, xmm1, xmm2. So we can duplicate the src operand to avoid the additional register dependency.

vcvtss2sd xmm0, xmm0, xmm1 ;;; depends on xmm0 and xmm1
vcvtss2sd xmm0, xmm1, xmm1 ;;; depends on xmm1 only

[CarolEidt]

@fiigii - thanks! I knew there was something I was missing there.

[CarolEidt]

LGTM