Fix the encoding of vcvtps2ph

[tannergooding]

Follow up to #127094

The instruction was added a while ago but only started being utilized in the above PR. However, the instruction needs to be MR rather than RM encoded or it can cause invalid results in some scenarios.

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[Copilot]

Pull request overview

Fixes the CoreCLR xarch JIT’s encoding metadata for vcvtps2ph so it uses the correct MR form (destination in ModRM r/m), preventing incorrect results when the instruction is exercised (notably after #127094 enabled new usage).

Changes:

• Update vcvtps2ph instruction table entry to use the MR opcode slot instead of RM.
• Extend the emitter’s MRD/RRD/imm8 handling to recognize INS_vcvtps2ph.
• Ensure ConvertToVector{128,256}Half store paths are categorized with other ins reg/mem, xmm, imm8 intrinsics in store-indirect codegen.

Reviewed changes

Copilot reviewed 3 out of 3 changed files in this pull request and generated no comments.

File	Description
src/coreclr/jit/instrsxarch.h	Moves vcvtps2ph encoding from RM to MR in the instruction metadata table.
src/coreclr/jit/emitxarch.cpp	Allows vcvtps2ph in the MRD/RRD/CNS emission path used for “dest r/m, src reg, imm8” forms.
src/coreclr/jit/codegenxarch.cpp	Adds AVX2 half-conversion intrinsics to the store-indirect handling bucket that expects ins reg/mem, xmm, imm8.