Skip to content

Fix the encoding of vcvtps2ph #127111

New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

Sign up for GitHub

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Merged
tannergooding merged 1 commit into from
Apr 19, 2026
Merged

Fix the encoding of vcvtps2ph #127111

Show file tree
Hide file tree
Changes from all commits
Commits
Show all changes
1 commit
Select commit
File filter

Filter by extension

Filter by extension
Conversations
Failed to load comments.
Loading
Jump to
Jump to file
Failed to load files.
Loading
Diff view
Diff view
2 changes: 2 additions & 0 deletions src/coreclr/jit/codegenxarch.cpp
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -5605,6 +5605,8 @@ void CodeGen::genCodeForStoreInd(GenTreeStoreInd* tree)
case NI_X86Base_Extract:
case NI_X86Base_X64_Extract:
case NI_AVX_ExtractVector128:
case NI_AVX2_ConvertToVector128Half:
case NI_AVX2_ConvertToVector256Half:
case NI_AVX2_ExtractVector128:
case NI_AVX512_ExtractVector128:
case NI_AVX512_ExtractVector256:
Expand Down
2 changes: 1 addition & 1 deletion src/coreclr/jit/emitxarch.cpp
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -19777,7 +19777,7 @@ size_t emitter::emitOutputInstr(insGroup* ig, instrDesc* id, BYTE** dp)
{
assert((ins == INS_vextractf32x4) || (ins == INS_vextractf32x8) || (ins == INS_vextractf64x2) ||
(ins == INS_vextractf64x4) || (ins == INS_vextracti32x4) || (ins == INS_vextracti32x8) ||
(ins == INS_vextracti64x2) || (ins == INS_vextracti64x4));
(ins == INS_vextracti64x2) || (ins == INS_vextracti64x4) || (ins == INS_vcvtps2ph));
assert(UseSimdEncoding());
emitGetInsDcmCns(id, &cnsVal);
// we do not need VEX.vvvv to encode the register operand
Expand Down
2 changes: 1 addition & 1 deletion src/coreclr/jit/instrsxarch.h
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -515,7 +515,7 @@ INST3(vzeroupper, "vzeroupper", IUM_WR, 0xC577F8, BAD_CODE,
// Instructions for AVX2, BMI1, BMI2, F16C, LZCNT, MOVBE
INST3(vbroadcasti32x4, "vbroadcasti128", IUM_WR, BAD_CODE, BAD_CODE, SSE38(0x5A), ILLEGAL, ILLEGAL, INS_TT_TUPLE4, Input_32Bit | KMask_Base4 | REX_W0 | Encoding_VEX | Encoding_EVEX | INS_FLAGS_HasPseudoName) // Broadcast packed integer values read from memory to entire ymm register
INST3(vcvtph2ps, "vcvtph2ps", IUM_WR, BAD_CODE, BAD_CODE, SSE38(0x13), ILLEGAL, ILLEGAL, INS_TT_HALF_MEM, Input_16Bit | KMask_Base4 | REX_W0 | Encoding_VEX | Encoding_EVEX) // Convert Packed FP16 Values to Single Precision Floating-Point Values
INST3(vcvtps2ph, "vcvtps2ph", IUM_WR, BAD_CODE, BAD_CODE, SSE3A(0x1D), ILLEGAL, ILLEGAL, INS_TT_HALF_MEM, Input_32Bit | KMask_Base4 | REX_W0 | Encoding_VEX | Encoding_EVEX) // Convert Single Precision FP Value to 16-bit FP Value
INST3(vcvtps2ph, "vcvtps2ph", IUM_WR, SSE3A(0x1D), BAD_CODE, BAD_CODE, ILLEGAL, ILLEGAL, INS_TT_HALF_MEM, Input_32Bit | KMask_Base4 | REX_W0 | Encoding_VEX | Encoding_EVEX) // Convert Single Precision FP Value to 16-bit FP Value
INST3(vextracti32x4, "vextracti128", IUM_WR, SSE3A(0x39), BAD_CODE, BAD_CODE, 3C, 1C, INS_TT_TUPLE4, Input_32Bit | KMask_Base4 | REX_W0 | Encoding_VEX | Encoding_EVEX | INS_FLAGS_HasPseudoName) // Extract 128-bit packed integer values
INST3(vgatherdpd, "vgatherdpd", IUM_WR, BAD_CODE, BAD_CODE, SSE38(0x92), ILLEGAL, ILLEGAL, INS_TT_TUPLE1_SCALAR, Input_64Bit | REX_W1 | Encoding_VEX | INS_Flags_IsDstDstSrcAVXInstruction) // Gather Packed DP FP Values Using Signed Dword Indices
INST3(vgatherdps, "vgatherdps", IUM_WR, BAD_CODE, BAD_CODE, SSE38(0x92), ILLEGAL, ILLEGAL, INS_TT_TUPLE1_SCALAR, Input_32Bit | REX_W0 | Encoding_VEX | INS_Flags_IsDstDstSrcAVXInstruction) // Gather Packed SP FP values Using Signed Dword Indices
Expand Down
Loading