comprehensive set of fixes for SUSY (complete) and EFT (partial) - keep susy_gg_tt, susy_gg_t1t1, heft_gg_h in repo and test them in CI#824
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…5#820 Now HRDCOD=0 builds of susy_gg_gogo.sa are successful and runTest.exe succeeds against the HRDCOD=1 reference
…HRDCOD=0 builds madgraph5#820 Now HRDCOD=0 builds of susy_gg_gogo.sa are successful and runTest.exe succeeds against the HRDCOD=1 reference
…pParam, improving HRDCOD=0 builds madgraph5#820
…rom 4 to 3, removing one with empty name - this fixes the HRDCOD=0 build
…aram>0 for HRDCOD=1 - now the C++ build succeeds (not yet the CUDA build) Note: runTest.exe fails for HRDCOD=1 when executed against the HRDCOD=0 reference
… CUDA: now include also a cxsmpl conversion to thrust complex Note: runTest.exe fails for HRDCOD=1 when executed against the HRDCOD=0 reference
…o thrust complex Now all combinations of HRDCOD=0,1 x FPTYPE=d,f,m build ok (but HRDCOD=1 tests fail)
…GONGPU_CPPCXTYPE_STDCOMPLEX
… is not enough, will revert and do this differemtly
… a cucomplex class instead, tested in gg_tt.sa This reverts commit 0d6da26.
… to fix cucomplex builds in gg_tt.sa With this patch, gg_tt.sa builds with HRDCOD=0,a and FPTYPE=d,f are successful with cucomplex
… allow susy_gg_t1t1.sa builds too with cucomplex (HARDCOD=0,1 and FPTYPE=d,f,m)
…for susy_gg_t1t1.sa - this includes fixes in cucomplex that are also needed in SM gg_tt (which was now broken)
…CODEGEN fix for madgraph5#821 Note: all builds succeed, and the HRDCOD=0 tests succeed without changing the reference output, while HRDCOD=1 tests fail as they did previously
…e line) More importantly, check that "mdl_bsmIndepParam[0] = mdl_I51x11;" must be in Param.cc and not in Param.h
…ents in Param.cc and remove them from Param.h
… fixed HRDCOD=0: now HRDCOD=1 also gives the same results!
…with the fixed HRDCOD=0: now HRDCOD=1 also gives the same results! The HRDCOD=0 fix in susy_gg_t1t1.sa consisted in adding mdl_bsmIndepParam assignments in Param.cc and removing them from Param.h
…1t1, and allow heftggt in mad mode
…more tests (d/f/m x susyggtt/susyggt1t1)
STARTED AT Sun Mar 17 12:45:55 PM CET 2024 ENDED AT Sun Mar 17 12:51:21 PM CET 2024 Status=0 24 /data/avalassi/GPU2023/madgraph4gpuX/epochX/cudacpp/tmad/logs_eemumu_mad/log_eemumu_mad_d_inl0_hrd0.txt 24 /data/avalassi/GPU2023/madgraph4gpuX/epochX/cudacpp/tmad/logs_eemumu_mad/log_eemumu_mad_f_inl0_hrd0.txt 24 /data/avalassi/GPU2023/madgraph4gpuX/epochX/cudacpp/tmad/logs_eemumu_mad/log_eemumu_mad_m_inl0_hrd0.txt 24 /data/avalassi/GPU2023/madgraph4gpuX/epochX/cudacpp/tmad/logs_ggttggg_mad/log_ggttggg_mad_d_inl0_hrd0.txt 24 /data/avalassi/GPU2023/madgraph4gpuX/epochX/cudacpp/tmad/logs_ggttggg_mad/log_ggttggg_mad_f_inl0_hrd0.txt 24 /data/avalassi/GPU2023/madgraph4gpuX/epochX/cudacpp/tmad/logs_ggttggg_mad/log_ggttggg_mad_m_inl0_hrd0.txt 24 /data/avalassi/GPU2023/madgraph4gpuX/epochX/cudacpp/tmad/logs_ggttgg_mad/log_ggttgg_mad_d_inl0_hrd0.txt 24 /data/avalassi/GPU2023/madgraph4gpuX/epochX/cudacpp/tmad/logs_ggttgg_mad/log_ggttgg_mad_f_inl0_hrd0.txt 24 /data/avalassi/GPU2023/madgraph4gpuX/epochX/cudacpp/tmad/logs_ggttgg_mad/log_ggttgg_mad_m_inl0_hrd0.txt 24 /data/avalassi/GPU2023/madgraph4gpuX/epochX/cudacpp/tmad/logs_ggttg_mad/log_ggttg_mad_d_inl0_hrd0.txt 24 /data/avalassi/GPU2023/madgraph4gpuX/epochX/cudacpp/tmad/logs_ggttg_mad/log_ggttg_mad_f_inl0_hrd0.txt 24 /data/avalassi/GPU2023/madgraph4gpuX/epochX/cudacpp/tmad/logs_ggttg_mad/log_ggttg_mad_m_inl0_hrd0.txt 24 /data/avalassi/GPU2023/madgraph4gpuX/epochX/cudacpp/tmad/logs_ggtt_mad/log_ggtt_mad_d_inl0_hrd0.txt 24 /data/avalassi/GPU2023/madgraph4gpuX/epochX/cudacpp/tmad/logs_ggtt_mad/log_ggtt_mad_f_inl0_hrd0.txt 24 /data/avalassi/GPU2023/madgraph4gpuX/epochX/cudacpp/tmad/logs_ggtt_mad/log_ggtt_mad_m_inl0_hrd0.txt 24 /data/avalassi/GPU2023/madgraph4gpuX/epochX/cudacpp/tmad/logs_gqttq_mad/log_gqttq_mad_d_inl0_hrd0.txt 24 /data/avalassi/GPU2023/madgraph4gpuX/epochX/cudacpp/tmad/logs_gqttq_mad/log_gqttq_mad_f_inl0_hrd0.txt 24 /data/avalassi/GPU2023/madgraph4gpuX/epochX/cudacpp/tmad/logs_gqttq_mad/log_gqttq_mad_m_inl0_hrd0.txt 0 /data/avalassi/GPU2023/madgraph4gpuX/epochX/cudacpp/tmad/logs_susyggt1t1_mad/log_susyggt1t1_mad_d_inl0_hrd0.txt 0 /data/avalassi/GPU2023/madgraph4gpuX/epochX/cudacpp/tmad/logs_susyggt1t1_mad/log_susyggt1t1_mad_f_inl0_hrd0.txt 0 /data/avalassi/GPU2023/madgraph4gpuX/epochX/cudacpp/tmad/logs_susyggt1t1_mad/log_susyggt1t1_mad_m_inl0_hrd0.txt 0 /data/avalassi/GPU2023/madgraph4gpuX/epochX/cudacpp/tmad/logs_susyggtt_mad/log_susyggtt_mad_d_inl0_hrd0.txt 0 /data/avalassi/GPU2023/madgraph4gpuX/epochX/cudacpp/tmad/logs_susyggtt_mad/log_susyggtt_mad_f_inl0_hrd0.txt 0 /data/avalassi/GPU2023/madgraph4gpuX/epochX/cudacpp/tmad/logs_susyggtt_mad/log_susyggtt_mad_m_inl0_hrd0.txt
./tput/allTees.sh -nobsm STARTED AT Sun Mar 17 01:20:26 PM CET 2024 ./tput/teeThroughputX.sh -mix -hrd -makej -eemumu -ggtt -ggttg -ggttgg -gqttq -ggttggg -makeclean ENDED(1) AT Sun Mar 17 01:46:55 PM CET 2024 [Status=0] ./tput/teeThroughputX.sh -flt -hrd -makej -eemumu -ggtt -ggttgg -inlonly -makeclean ENDED(2) AT Sun Mar 17 01:56:40 PM CET 2024 [Status=0] ./tput/teeThroughputX.sh -makej -eemumu -ggtt -ggttg -gqttq -ggttgg -ggttggg -flt -bridge -makeclean ENDED(3) AT Sun Mar 17 02:06:24 PM CET 2024 [Status=0] ./tput/teeThroughputX.sh -eemumu -ggtt -ggttgg -flt -rmbhst ENDED(4) AT Sun Mar 17 02:09:40 PM CET 2024 [Status=0] ./tput/teeThroughputX.sh -eemumu -ggtt -ggttgg -flt -curhst ENDED(5) AT Sun Mar 17 02:12:54 PM CET 2024 [Status=0] ./tput/teeThroughputX.sh -eemumu -ggtt -ggttgg -flt -common ENDED(6) AT Sun Mar 17 02:16:12 PM CET 2024 [Status=0] SKIP './tput/teeThroughputX.sh -flt -hrd -makej -susyggtt -susyggt1t1 -heftggh -makeclean ' ENDED(7) AT Sun Mar 17 02:16:12 PM CET 2024 [Status=0]
./tmad/allTees.sh -nobsm STARTED AT Sun Mar 17 02:16:12 PM CET 2024 ENDED AT Sun Mar 17 06:40:08 PM CET 2024 Status=0 24 /data/avalassi/GPU2023/madgraph4gpuX/epochX/cudacpp/tmad/logs_eemumu_mad/log_eemumu_mad_d_inl0_hrd0.txt 24 /data/avalassi/GPU2023/madgraph4gpuX/epochX/cudacpp/tmad/logs_eemumu_mad/log_eemumu_mad_f_inl0_hrd0.txt 24 /data/avalassi/GPU2023/madgraph4gpuX/epochX/cudacpp/tmad/logs_eemumu_mad/log_eemumu_mad_m_inl0_hrd0.txt 24 /data/avalassi/GPU2023/madgraph4gpuX/epochX/cudacpp/tmad/logs_ggttggg_mad/log_ggttggg_mad_d_inl0_hrd0.txt 24 /data/avalassi/GPU2023/madgraph4gpuX/epochX/cudacpp/tmad/logs_ggttggg_mad/log_ggttggg_mad_f_inl0_hrd0.txt 24 /data/avalassi/GPU2023/madgraph4gpuX/epochX/cudacpp/tmad/logs_ggttggg_mad/log_ggttggg_mad_m_inl0_hrd0.txt 24 /data/avalassi/GPU2023/madgraph4gpuX/epochX/cudacpp/tmad/logs_ggttgg_mad/log_ggttgg_mad_d_inl0_hrd0.txt 24 /data/avalassi/GPU2023/madgraph4gpuX/epochX/cudacpp/tmad/logs_ggttgg_mad/log_ggttgg_mad_f_inl0_hrd0.txt 24 /data/avalassi/GPU2023/madgraph4gpuX/epochX/cudacpp/tmad/logs_ggttgg_mad/log_ggttgg_mad_m_inl0_hrd0.txt 24 /data/avalassi/GPU2023/madgraph4gpuX/epochX/cudacpp/tmad/logs_ggttg_mad/log_ggttg_mad_d_inl0_hrd0.txt 24 /data/avalassi/GPU2023/madgraph4gpuX/epochX/cudacpp/tmad/logs_ggttg_mad/log_ggttg_mad_f_inl0_hrd0.txt 24 /data/avalassi/GPU2023/madgraph4gpuX/epochX/cudacpp/tmad/logs_ggttg_mad/log_ggttg_mad_m_inl0_hrd0.txt 24 /data/avalassi/GPU2023/madgraph4gpuX/epochX/cudacpp/tmad/logs_ggtt_mad/log_ggtt_mad_d_inl0_hrd0.txt 24 /data/avalassi/GPU2023/madgraph4gpuX/epochX/cudacpp/tmad/logs_ggtt_mad/log_ggtt_mad_f_inl0_hrd0.txt 24 /data/avalassi/GPU2023/madgraph4gpuX/epochX/cudacpp/tmad/logs_ggtt_mad/log_ggtt_mad_m_inl0_hrd0.txt 24 /data/avalassi/GPU2023/madgraph4gpuX/epochX/cudacpp/tmad/logs_gqttq_mad/log_gqttq_mad_d_inl0_hrd0.txt 24 /data/avalassi/GPU2023/madgraph4gpuX/epochX/cudacpp/tmad/logs_gqttq_mad/log_gqttq_mad_f_inl0_hrd0.txt 24 /data/avalassi/GPU2023/madgraph4gpuX/epochX/cudacpp/tmad/logs_gqttq_mad/log_gqttq_mad_m_inl0_hrd0.txt 0 /data/avalassi/GPU2023/madgraph4gpuX/epochX/cudacpp/tmad/logs_susyggt1t1_mad/log_susyggt1t1_mad_d_inl0_hrd0.txt 0 /data/avalassi/GPU2023/madgraph4gpuX/epochX/cudacpp/tmad/logs_susyggt1t1_mad/log_susyggt1t1_mad_f_inl0_hrd0.txt 0 /data/avalassi/GPU2023/madgraph4gpuX/epochX/cudacpp/tmad/logs_susyggt1t1_mad/log_susyggt1t1_mad_m_inl0_hrd0.txt 0 /data/avalassi/GPU2023/madgraph4gpuX/epochX/cudacpp/tmad/logs_susyggtt_mad/log_susyggtt_mad_d_inl0_hrd0.txt 0 /data/avalassi/GPU2023/madgraph4gpuX/epochX/cudacpp/tmad/logs_susyggtt_mad/log_susyggtt_mad_f_inl0_hrd0.txt 0 /data/avalassi/GPU2023/madgraph4gpuX/epochX/cudacpp/tmad/logs_susyggtt_mad/log_susyggtt_mad_m_inl0_hrd0.txt
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Ok I have completed my tests. Note, I have also implemented the "tmad" tests comparing fortran to cuda/cpp, an dthey fail for both susy_gg_tt #825 and for susy_gg_t1t1 #826. But I suggest meging this one already (which fixes many other things!) and then addressing those other issues later. By the way, again, eventually I'd like to remove heft_gg_h by something more interesting, since heft seems fixed (unlike smeft). |
oliviermattelaer
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Sounds good some minor point to check -> let's say approve!!!!
Thank you
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I will merge to ease the comparison to smeft and then heft. Keep here the three comments for later:
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… and SMEFT madgraph5#632) into heft
Ok I have added comments on all three points (previously resolved without answers). All done for me. |
… and SMEFT madgraph5#632) into jtmk Fix minor conflicts: epochX/cudacpp/tput/throughputX.sh
…stead of param.name to check if a parameter is used to compute dependent couplings See the review of PR madgraph5#824 madgraph5#824 (comment)
Hi @oliviermattelaer I have completed many more fixes for SUSY so I am including them here.
This PR includes also all the changes that are in PR #625 (first set of susy changes) and in PR #822 (fix for a helas bug affecting also non SUSY processes). I filed separate PRs to make it easier (maybe) to review.
But if you prefer, I can also just merge this straight away and close the other two.
Can you please review?
Notes
The status is: all SUSY processes that I tried are now correctly code generated, built and tested. Can you maybe also suggest new processes to try?
Thanks
Andrea
cc @roiser