Skip to content

Comments

processor_rng: Add support for ARMv8.5-A FEAT_RNG extension#5228

Open
mikatammi wants to merge 3 commits intorandombit:masterfrom
mikatammi:arm64_rng
Open

processor_rng: Add support for ARMv8.5-A FEAT_RNG extension#5228
mikatammi wants to merge 3 commits intorandombit:masterfrom
mikatammi:arm64_rng

Conversation

@mikatammi
Copy link

Add support for ARMv8.5-A FEAT_RNG extension into processor_rng.
Add ISA extension for the RNG extension, and also new flag into cpuid_arm64.

I'm wondering is this enough or should I also do something else for this PR? (I was thinking about maybe adding those instruction probes into cpuid_aarch64?) I have tested this only on aarch64-linux. On aarch64-darwin I tried to force the RNG extension to be used and I got an illegal instruction when running on Macbook Pro with M3 Max.

Copy link

Copilot AI left a comment

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

Pull request overview

This PR adds support for the ARMv8.5-A FEAT_RNG extension to the processor_rng module, enabling hardware random number generation on ARM64 platforms that support this feature. The implementation adds CPU feature detection via Linux hwcap2, integrates the RNDR instruction into the RNG implementation, and configures the build system with appropriate compiler flags.

Changes:

  • Added RNG CPU feature flag and detection for ARM64 via hwcap2
  • Implemented RNDR instruction support in processor_rng with both inline assembly and intrinsic paths
  • Updated build system configuration to enable ARMv8.5-a+rng compiler flags for GCC and Clang

Reviewed changes

Copilot reviewed 8 out of 8 changed files in this pull request and generated 1 comment.

Show a summary per file
File Description
src/lib/utils/cpuid/cpuid_aarch64/cpuid_features.h Adds RNG bit flag to CPUFeature enum
src/lib/utils/cpuid/cpuid_aarch64/cpuid_features.cpp Adds string mapping for RNG feature ("armv8rng")
src/lib/utils/cpuid/cpuid_aarch64/cpuid_aarch64.cpp Implements RNG detection via hwcap2 auxval on Linux
src/lib/rng/processor_rng/processor_rng.cpp Implements RNDR instruction for ARM64 with success validation
src/lib/rng/processor_rng/info.txt Adds arm64 architecture support and armv8rng ISA requirement
src/build-data/cc/gcc.txt Adds GCC compiler flag for armv8rng ISA extension
src/build-data/cc/clang.txt Adds Clang compiler flag for armv8rng ISA extension
src/build-data/arch/arm64.txt Registers armv8rng as an ISA extension for arm64

💡 Add Copilot custom instructions for smarter, more guided reviews. Learn how to get started.

randombit added a commit that referenced this pull request Jan 11, 2026
This seems to be needed for ARMv8.5 RNG support (#5228)
randombit added a commit that referenced this pull request Jan 11, 2026
This seems to be needed for ARMv8.5 RNG support (#5228)
@randombit
Copy link
Owner

The CI failure looks relevant. I am not sure exactly why it's happening but it seems like the compiler is rejecting even inline asm that does not have the relevant CPU features enabled via either the command line or function attribute [*]. I think the fix is something like #5229

[*] You are correctly setting the command line flag but in the amalgamation mode that doesn't appear.

I was thinking about maybe adding those instruction probes into cpuid_aarch64?

I would say do not, unless you have personally a specific need for this. Despite being the person who wrote that SIGILL-based instruction probing code, I am not at all enthused about its existence, and inclined to the take that if the operating system just cannot be bothered to expose the relevant APIs we need to detect CPU features (getauxval, sysctlbyname, whatever Windows API that we don't currently support, ...) then it probably deserves to be slow.

@randombit randombit added this to the Botan 3.11 milestone Jan 11, 2026
randombit added a commit that referenced this pull request Jan 11, 2026
This seems to be needed for ARMv8.5 RNG support (#5228)
randombit added a commit that referenced this pull request Jan 11, 2026
This seems to be needed for ARMv8.5 RNG support (#5228)
@mikatammi
Copy link
Author

Okay good to know, I was wondering why the probing was done like that. I'm thinking the proper way would probably be to read the ID_AA64ISAR0_EL1, AArch64 Instruction Set Attribute Register 0, and check the values for existence of different ISA extensions, instead of trying to "brute-force" and probe through all of them.

image

The ARM architecture reference manual is available as a PDF here: https://developer.arm.com/documentation/ddi0487/latest

@coveralls
Copy link

coveralls commented Jan 11, 2026

Coverage Status

coverage: 90.433% (-0.001%) from 90.434%
when pulling c7b6852 on mikatammi:arm64_rng
into b941fcb on randombit:master.

@randombit
Copy link
Owner

read the ID_AA64ISAR0_EL1

Isn't this only readable in kernel mode though?

@mikatammi
Copy link
Author

mikatammi commented Jan 11, 2026

read the ID_AA64ISAR0_EL1

Isn't this only readable in kernel mode though?

It is readable at least in Linux userspace, I tested with: asm volatile("mrs %0, id_aa64isar0_el1" : "=r"(output) : "0"(output) : "cc");

@mikatammi
Copy link
Author

mikatammi commented Jan 11, 2026

I rebased this on top of #5229 for now

@mikatammi
Copy link
Author

Also dropped the commit which had the legacy module-level armv8rng extension specifications for arm64. If you want I can add those back, I'm not sure is this project trying to migrate away from those?

Signed-off-by: Mika Tammi <mikatammi@gmail.com>
Signed-off-by: Mika Tammi <mikatammi@gmail.com>
Signed-off-by: Mika Tammi <mikatammi@gmail.com>
@mikatammi
Copy link
Author

@randombit Could you please trigger the CI tests again?

Sign up for free to join this conversation on GitHub. Already have an account? Sign in to comment

Labels

None yet

Projects

None yet

Development

Successfully merging this pull request may close these issues.

3 participants