SoundWire: updates before LunarLake introduction #4157
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Prepare for reused for addition of new hardware Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
The PDIs don't really have a notion of rates and formats, only channels are relevant. Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
This is not relevant and not aligned with hardware definitions. In addition, we've tested higher resolution formats so this is ignored at a higher level. Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
PDM is supported in the hardware but never enabled: there are no known PDM-based devices. We can directly call the PCM helper. Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
In the existing code, the SHIM_SYNC::SYNC_GO bit is set, and the code waits for it to return to zero. That second wait part is just wrong: the SYNC_GO bit is *write-only* so there's no way to know if it's cleared by hardware. The code works because the value for a read-only bit is zero, but that's really just luck. Simplify the sequence to a plain read-modify-write. Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
The bus start/stop sequences can be reused between platforms if we add a couple of new callbacks. In following patches the code will be moved to a shared file. Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
There was no benefit to using the existing abstraction, but since we are going to move the code make sure we do use the ops. Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
Now that the bus start/stop/clock_stop sequences use the ops, we can move them to a different file to reuse them. Note that we could in theory remove the abstraction for all those sequences and directly call the functions in intel_auxdevice.c. To allow for more flexibility and have means to special-case new platforms, we decided to keep the abstraction. If in time it becomes clear there is no benefit the abstraction will be simplified. Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
If we add one more callback, we can have common bank switch sequences between old and new hardware: the only difference is where the CMDSYNC register is located. Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
No functionality change, just moving the routines to a common file so that they can be used for new hardware. Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
This field is not used, and its definition is not aligned with the hardware specification. Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
The latest Cadence IP splits some of the existing registers into two, separated by a fixed offset. The bitfields themselves remain at the same position, so we can use new helpers to dynamically add the fixed offset. For example, the existing MCP_CONFIG is now split in two with MCP_CONFIG and IP_MCP_CONFIG (the naming comes directly from the design document). This patch adds helpers to access registers with the IP_ prefix. The addition of the 'ip' prefix for helpers, registers and bitfields is intentional to help reviewers spot any mistake. For existing solutions, the offset is exactly zero so there's no functional change - the MCP_CONFIG and IP_MCP_CONFIG are aliased to the same address. Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
The latest Cadence IP splits the MCP_CONFIG fields in two registers: MCP_CONFIG and IP_MCP_CONFIG. Rename the relevant fields and change the access methods used for those fields. For existing solutions, this is an iso-functionality change. Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
The latest Cadence IP splits the MCP_CONTROL fields in two registers: MCP_CONTROL and IP_MCP_CONTROL. Rename the relevant fields and change the access methods used for those fields. For existing solutions, this is an iso-functionality change. Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
The latest Cadence IP splits the MCP_CMDCTRL fields in two registers: MCP_CMDCTRL and IP_MCP_CMDCTRL. Rename the relevant fields and change the access methods used for those fields. In practice we only use the Parity error insertion in IP_CMD_CTRL. For existing solutions, this is an iso-functionality change. Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
The latest Cadence IP moves MCP_CMD_BASE and MCP_CMD_RESP to the IP_MCP_CMD_BASE and IP_MCP_CMD_RESP registers located in different area and accessed with a fixed offset. Unlike other patches, the fields are not renamed to avoid a very invasive and low-value set of changes. For existing solutions, this is an iso-functionality change. Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
plbossart
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RanderWang,
jack-cy-yu,
oder-chiou,
ryans-lee and
shumingfan
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bardliao
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Jan 31, 2023
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This PR provides a set of cleanups and new abstractions needed for the introduction of LunarLake support.
For now this is an iso-functionality change, with changes on the Intel and Cadence sides. The low-level support for LunarLake will be introduced in a follow-up PR that depends on HDaudio multi-link extensions.