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DMIC topology updates patch set #1480

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Merged
lgirdwood merged 2 commits into from
May 29, 2019
Merged

DMIC topology updates patch set #1480

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178132f
Topology: Add support for 4ch 32bit 48kHz DMIC DAI
singalsu May 28, 2019
a3c2a7d
Topology: Change 16kHz DMIC DAI into 32bit mode and make scheduling 1ms
singalsu May 28, 2019
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35 changes: 18 additions & 17 deletions tools/topology/platform/intel/intel-generic-dmic.m4
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Original file line number Diff line number Diff line change
Expand Up @@ -18,16 +18,15 @@ dnl frames, deadline, priority, core)

# Passthrough capture pipeline using max channels defined by CHANNELS.
# Schedule 48 frames per 1000us deadline on core 0 with priority 0
ifelse(CHANNELS, 4, `',
`PIPELINE_PCM_ADD(sof/pipe-volume-capture.m4,
PIPELINE_PCM_ADD(sof/pipe-volume-capture.m4,
DMIC_PIPELINE_48k_ID, DMIC_DAI_LINK_48k_ID, CHANNELS, s32le,
48, 1000, 0, 0)')
48, 1000, 0, 0)

# Passthrough capture pipeline using max channels defined by CHANNELS.
# Schedule 48 frames per 1000us deadline on core 0 with priority 0
# Schedule 16 frames per 1000us deadline on core 0 with priority 0
PIPELINE_PCM_ADD(sof/pipe-volume-capture-16khz.m4,
DMIC_PIPELINE_16k_ID, DMIC_DAI_LINK_16k_ID, CHANNELS, s16le,
48, 1000, 0, 0)
DMIC_PIPELINE_16k_ID, DMIC_DAI_LINK_16k_ID, CHANNELS, s32le,
16, 1000, 0, 0)

#
# DAIs configuration
Expand All @@ -40,24 +39,22 @@ dnl frames, deadline, priority, core)

# capture DAI is DMIC 0 using 2 periods
# Buffers use s32le format, with 48 frame per 1000us on core 0 with priority 0
ifelse(CHANNELS, 4, `',
`DAI_ADD(sof/pipe-dai-capture.m4,
DAI_ADD(sof/pipe-dai-capture.m4,
DMIC_PIPELINE_48k_ID, DMIC, 0, dmic01,
concat(`PIPELINE_SINK_', DMIC_PIPELINE_48k_ID), 2, s32le,
48, 1000, 0, 0)')
48, 1000, 0, 0)

# capture DAI is DMIC 1 using 2 periods
# Buffers use s16le format, with 48 frame per 1000us on core 0 with priority 0
# Buffers use s32le format, with 16 frame per 1000us on core 0 with priority 0
DAI_ADD(sof/pipe-dai-capture.m4,
DMIC_PIPELINE_16k_ID, DMIC, 1, dmic16k,
concat(`PIPELINE_SINK_', DMIC_PIPELINE_16k_ID), 2, s16le,
48, 1000, 0, 0)
concat(`PIPELINE_SINK_', DMIC_PIPELINE_16k_ID), 2, s32le,
16, 1000, 0, 0)


dnl PCM_DUPLEX_ADD(name, pcm_id, playback, capture)
dnl PCM_CAPTURE_ADD(name, pipeline, capture)
ifelse(CHANNELS, 4, `',
`PCM_CAPTURE_ADD(DMIC32, DMIC_DAI_LINK_48k_ID, concat(`PIPELINE_PCM_', DMIC_PIPELINE_48k_ID))')
PCM_CAPTURE_ADD(DMIC32, DMIC_DAI_LINK_48k_ID, concat(`PIPELINE_PCM_', DMIC_PIPELINE_48k_ID))
PCM_CAPTURE_ADD(DMIC16, DMIC_DAI_LINK_16k_ID, concat(`PIPELINE_PCM_', DMIC_PIPELINE_16k_ID))

#
Expand All @@ -66,17 +63,21 @@ PCM_CAPTURE_ADD(DMIC16, DMIC_DAI_LINK_16k_ID, concat(`PIPELINE_PCM_', DMIC_PIPEL

dnl DAI_CONFIG(type, dai_index, link_id, name, ssp_config/dmic_config)
ifelse(CHANNELS, 4,
`', `DAI_CONFIG(DMIC, 0, DMIC_DAI_LINK_48k_ID, dmic01,
`DAI_CONFIG(DMIC, 0, DMIC_DAI_LINK_48k_ID, dmic01,
DMIC_CONFIG(1, 500000, 4800000, 40, 60, 48000,
DMIC_WORD_LENGTH(s32le), DMIC, 0,
PDM_CONFIG(DMIC, 0, FOUR_CH_PDM0_PDM1)))',
`DAI_CONFIG(DMIC, 0, DMIC_DAI_LINK_48k_ID, dmic01,
DMIC_CONFIG(1, 500000, 4800000, 40, 60, 48000,
DMIC_WORD_LENGTH(s32le), DMIC, 0,
PDM_CONFIG(DMIC, 0, STEREO_PDM0)))')

ifelse(CHANNELS, 4,
`DAI_CONFIG(DMIC, 1, DMIC_DAI_LINK_16k_ID, dmic16k,
DMIC_CONFIG(1, 500000, 4800000, 40, 60, 16000,
DMIC_WORD_LENGTH(s16le), DMIC, 1,
DMIC_WORD_LENGTH(s32le), DMIC, 1,
PDM_CONFIG(DMIC, 1, FOUR_CH_PDM0_PDM1)))',
`DAI_CONFIG(DMIC, 1, DMIC_DAI_LINK_16k_ID, dmic16k,
DMIC_CONFIG(1, 500000, 4800000, 40, 60, 16000,
DMIC_WORD_LENGTH(s16le), DMIC, 1,
DMIC_WORD_LENGTH(s32le), DMIC, 1,
PDM_CONFIG(DMIC, 1, STEREO_PDM0)))')