systolic-arrays

Here are 4 public repositories matching this topic...

Working 8x8 systolic array hardware implemented in Xilinx Vivado, operated and controlled in software using Xilinx Vitis

sdk fpga hardware accelerator matrix project matrix-multiplication verilog xilinx vivado systemverilog hardware-designs hdl hardware-acceleration zynq-7000 systolic-arrays pynq-z2 vitis

SystemVerilog module for matrix multiplication

verilog systemverilog pynq systolic-arrays

Systolic array matrix multiplication controller core

N*N systolic array multiplication using multiply and accumulate processing element

Add a description, image, and links to the systolic-arrays topic page so that developers can more easily learn about it.

To associate your repository with the systolic-arrays topic, visit your repo's landing page and select "manage topics."