feat(prover): add MEMW_A aligned-memory fast path table

executor/programs/asm/test_memw_split_ts.s

@@ -0,0 +1,24 @@
+	.attribute	5, "rv64i2p1"
+	.globl	main
+main:
+	# Exercise both MEMW (split old_timestamp) and MEMW_A (aligned fast path).
+	#
+	# MEMW path: sb+sb then lh — the two bytes at sp+0 and sp+1 are written
+	# by separate instructions (different timestamps), so the lh read has
+	# mismatched old_timestamps and routes to MEMW.
+	#
+	# MEMW_A path: sw then lw — all 4 bytes are written by one instruction
+	# (same timestamp), so the lw read routes to MEMW_A.
+	addi	sp, sp, -16		# allocate stack
+	addi	t0, zero, 0x41		# t0 = 'A'
+	addi	t1, zero, 0x42		# t1 = 'B'
+	sb	t0, 0(sp)		# write byte 0 at sp+0 (timestamp T3)
+	sb	t1, 1(sp)		# write byte 1 at sp+1 (timestamp T4 ≠ T3)
+	lh	a0, 0(sp)		# read 2 bytes: old_ts[0]=T3, old_ts[1]=T4 → MEMW
+	addi	t2, zero, 0x7FF		# t2 = word value
+	sw	t2, 4(sp)		# write 4 bytes at sp+4, all timestamp T7 → MEMW_A
+	lw	a1, 4(sp)		# read 4 bytes: all old_ts=T7 → MEMW_A
+	addi	sp, sp, 16		# deallocate stack
+	li	a0, 0
+	li	a7, 93
+	ecall

prover/src/lib.rs

@@ -41,7 +41,8 @@ use crate::tables::types::BusId;
 use crate::test_utils::{
     E, F, VmAir, create_bitwise_air, create_branch_air, create_commit_air, create_cpu_air,
     create_decode_air, create_dvrm_air, create_halt_air, create_load_air, create_lt_air,
-    create_memw_air, create_mul_air, create_page_air, create_register_air, create_shift_air,
+    create_memw_air, create_memw_aligned_air, create_mul_air, create_page_air, create_register_air,
+    create_shift_air,
 };
 
 use stark::proof::options::{GoldilocksCubicProofOptions, ProofOptions};
@@ -66,6 +67,7 @@ pub struct TableCounts {
     pub cpu: usize,
     pub lt: usize,
     pub memw: usize,
+    pub memw_aligned: usize,
     pub load: usize,
     pub mul: usize,
     pub dvrm: usize,
@@ -80,7 +82,15 @@ impl TableCounts {
     /// allowing a malicious prover to bypass soundness checks.
     /// Sum of all chunk counts across split tables.
     pub fn total(&self) -> usize {
-        self.cpu + self.lt + self.memw + self.load + self.mul + self.dvrm + self.shift + self.branch
+        self.cpu
+            + self.lt
+            + self.memw
+            + self.memw_aligned
+            + self.load
+            + self.mul
+            + self.dvrm
+            + self.shift
+            + self.branch
     }
 
     /// Validate that all required tables have at least one chunk.
@@ -92,6 +102,7 @@ impl TableCounts {
             ("cpu", self.cpu),
             ("lt", self.lt),
             ("memw", self.memw),
+            ("memw_aligned", self.memw_aligned),
             ("load", self.load),
             ("mul", self.mul),
             ("dvrm", self.dvrm),
@@ -174,6 +185,7 @@ pub(crate) struct VmAirs {
     pub lts: Vec<VmAir>,
     pub shifts: Vec<VmAir>,
     pub memws: Vec<VmAir>,
+    pub memw_aligneds: Vec<VmAir>,
     pub loads: Vec<VmAir>,
     pub decode: VmAir,
     pub muls: Vec<VmAir>,
@@ -208,6 +220,13 @@ impl VmAirs {
         for (air, trace) in self.memws.iter().zip(traces.memws.iter_mut()) {
             pairs.push((air, trace, &()));
         }
+        for (air, trace) in self
+            .memw_aligneds
+            .iter()
+            .zip(traces.memw_aligneds.iter_mut())
+        {
+            pairs.push((air, trace, &()));
+        }
         for (air, trace) in self.loads.iter().zip(traces.loads.iter_mut()) {
             pairs.push((air, trace, &()));
         }
@@ -249,6 +268,9 @@ impl VmAirs {
         for air in &self.memws {
             refs.push(air);
         }
+        for air in &self.memw_aligneds {
+            refs.push(air);
+        }
         for air in &self.loads {
             refs.push(air);
         }
@@ -301,6 +323,9 @@ impl VmAirs {
         let memws: Vec<_> = (0..table_counts.memw)
             .map(|i| create_memw_air(proof_options).with_name(&format!("MEMW[{}]", i)))
             .collect();
+        let memw_aligneds: Vec<_> = (0..table_counts.memw_aligned)
+            .map(|i| create_memw_aligned_air(proof_options).with_name(&format!("MEMW_A[{}]", i)))
+            .collect();
         let loads: Vec<_> = (0..table_counts.load)
             .map(|i| create_load_air(proof_options).with_name(&format!("LOAD[{}]", i)))
             .collect();
@@ -343,6 +368,7 @@ impl VmAirs {
             lts,
             shifts,
             memws,
+            memw_aligneds,
             loads,
             decode,
             muls,