Don't merge loads for xmm registers#4891
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elliottt merged 3 commits intobytecodealliance:mainfrom Sep 12, 2022
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Do not merge loads for xmm registers, as alignment requirements currently aren't satisfied with clif lowered from wasm. Fixes bytecodealliance#4890
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In [bytecodealliance#10408], the new assembler re-opened an old issue related to unaligned loads with SSE instructions. SSE instructions expect 128-bit aligned loads when using the `m128` operand and fault if that is not the case. This had been fixed previously by disallowing load-sinking for `XmmMem` ([bytecodealliance#4891]) but more recently we had adopted the use of `XmmMemAligned`. Since all the CI machines have AVX, these unaligned, sunk loads would use the AVX lowering which can handle unaligned accesses. This only appeared during fuzzing when AVX was disabled. This change adopts the `XmmMemAligned` type in the generated assembler code. This is temporary, though: a more lasting fix should pass along an "alignment required" bit from the assembler AST. Closes bytecodealliance#10408. [bytecodealliance#10408]: bytecodealliance#10408 [bytecodealliance#4891]: bytecodealliance#4891
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In [bytecodealliance#10408], the new assembler re-opened an old issue related to unaligned loads with SSE instructions. SSE instructions expect 128-bit aligned loads when using the `m128` operand and fault if that is not the case. This had been fixed previously by disallowing load-sinking for `XmmMem` ([bytecodealliance#4891]) but more recently we had adopted the use of `XmmMemAligned` in `cranelift-codegen`. Since [bytecodealliance#10316] had no knowledge of `XmmMemAligned` (only `XmmMem`), it caused the same kind fault--an OOB trap that was in fact an unaligned load. Why didn't CI catch this? Since all the CI machines have AVX and we do not explicitly test the SSE-only case, these unaligned, sunk loads would use the AVX lowering in CI. AVX loads handle unaligned accesses without a fault. This was only discovered during fuzzing when AVX was disabled (i.e., `--target x86_64-unknown-linux-gnu`). To fix this, this change adopts the `XmmMemAligned` type in the generated assembler code. This is temporary, though: a more lasting fix should pass along an "alignment required" bit from the assembler AST. In the meantime, this closes bytecodealliance#10408. [bytecodealliance#10408]: bytecodealliance#10408 [bytecodealliance#4891]: bytecodealliance#4891 [bytecodealliance#10316]: bytecodealliance#10316
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…10417) In [#10408], the new assembler re-opened an old issue related to unaligned loads with SSE instructions. SSE instructions expect 128-bit aligned loads when using the `m128` operand and fault if that is not the case. This had been fixed previously by disallowing load-sinking for `XmmMem` ([#4891]) but more recently we had adopted the use of `XmmMemAligned` in `cranelift-codegen`. Since [#10316] had no knowledge of `XmmMemAligned` (only `XmmMem`), it caused the same kind fault--an OOB trap that was in fact an unaligned load. Why didn't CI catch this? Since all the CI machines have AVX and we do not explicitly test the SSE-only case, these unaligned, sunk loads would use the AVX lowering in CI. AVX loads handle unaligned accesses without a fault. This was only discovered during fuzzing when AVX was disabled (i.e., `--target x86_64-unknown-linux-gnu`). To fix this, this change adopts the `XmmMemAligned` type in the generated assembler code. This is temporary, though: a more lasting fix should pass along an "alignment required" bit from the assembler AST. In the meantime, this closes #10408. [#10408]: #10408 [#4891]: #4891 [#10316]: #10316
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Do not merge loads for xmm registers, as alignment requirements currently aren't satisfied with clif lowered from wasm.
Fixes #4890