v0.42.0

v0.42.0 on PyPI

New Features

• run subcommand:
  • Introduce a new run subcommand capable of running targets until a time limit or EOT (suited for CI/CD workflows)
  • Supports semihosting console output/input and SWV output

Improvements

• Standard I/O routing:
  • Add new abstraction layer to unify STDIO routing for each core
  • Routing support for console, telnet, file and off

Note: Currently only output is supported

• CMSIS-Toolbox Run and Debug Management integration:
  • Add configuration layer in session options, which sits below command line arguments
  • Disable *.cbuild-run.yml processing if the target_override option is set
  • Improve port assignment logic for multi-core GDBServer and telnet configurations
  • Add processing for connect mode configuration
  • Add processing for pre-reset and post-reset options in load-setup configuration
  • Improve error messages for missing or invalid *.cbuild-run.yml file
  • Improve checking for required files
    • Raise a warning instead of an error for missing SVD files
    • Load SVD files only when available and when used by the subcommand
• Flash programming:
  • Add new session options for configuring pre-reset and post-reset type in load subcommand
  • Relax flash algorithm requirement to require only RO section
• RTOS:
  • Update Zephyr thread state definitions to match modern versions (@mathieuchopstm)
• CoreSight and Cortex-M:
  • Add support for Cortex-M52 and Star-MC3 based devices (@Liu-Gu)
  • Skip adding cores not described in the debug topology while retaining direct AP access

Fixes

• Cortex-M:
  • Fix incorrect reset type used in the fallback mechanism when the requested DebugSequence doesn't exist
• CMSIS-DAP:
  • Fix HID report sizing logic across platforms
• CMSIS-Packs:
  • Correct path normalization inside pack archives to support .. in file paths (@xoriath)

Other

• Minor documentation updates related to session option usage

New Contributors

• @Liu-Gu made their first contribution in #1852
• @mathieuchopstm made their first contribution in #1823
• @xoriath made their first contribution in #1867

Full Changelog: v0.41.0...v0.42.0

v0.41.0

v0.41.0 on PyPI

Improvements

• Probe:
  • Enable STLINK-V3PWR probe

Fixes

• GDB Server:
  • Fix RTOS support for Zephyr (thread detection)
• CMSIS-DAP:
  • Improve robustness of HID read thread

Full Changelog: v0.40.0...v0.41.0

v0.40.0

v0.40.0 on PyPI

Improvements

• GDB Server:
  • Add support for multiple concurrent GDB client connections to the same GDB server
  • Improve logging with support for multiple concurrent GDB clients
  • Report correct target architecture and align registers with GDB feature names
• Cortex-M:
  • Add missing secure/non-secure core registers (CONTROL, FAULTMASK, BASEPRI, and PRIMASK)
• Reset Management:
  • Update ResetType API for clearer reset handling
  • Remove reset fallback mechanism for CMSIS-Pack based targets to prevent unintended behavior
  • Support custom reset sequence execution defined in CMSIS-Pack
  • Refine debug sequence error handling and breakpoint management across resets
• Load (Flashing):
  • Remove implicit resets between loading multiple application files
  • Set Reset Catch on all cores when performing primary-core reset before flashing
  • Perform a hardware reset (nSRST) after flashing to ensure a clean post-load state
• CMSIS-Toolbox Run and Debug Management integration:
  • Add CMSIS-Pack related commands to commander interface

Fixes

• ST-Link: correct reported length on memory read/write failures
• JLink: block unsupported memory access commands
• CMSIS-DAP: fix jtag_sequence returning no data (@NorbertHipfl)
• SWO: correct thread exit flag handling in the SWO read thread (@crypto-lars)
• Fix caching of banked SP registers to prevent stale values
• Fix memory region filtering for multi-core targets
• RTOS: handling for banked PSP registers
• RTX5:
  • Fix incorrect thread priority offset
  • Relax requirement for target in halted state in RTOS operations

Other

• Remove dependency on six package (@a-detiste)
• CI: remove deprecated GitHub Actions command (@CubikingChill)
• Update Capstone disassembly engine to version 5 (@Hoohaha)

New Contributors

• @NorbertHipfl made their first contribution in #1820
• @crypto-lars made their first contribution in #1824
• @CubikingChill made their first contribution in #1834

Full Changelog: v0.39.0...v0.40.0

v0.39.0

v0.39.0 on PyPI

Improvements

• CMSIS-Toolbox Run and Debug Management integration:
  • Set debugger protocol based on information from *.cbuild-run.yml file
  • Set output file type based on information from *.cbuild-run.yml file
  • Raise critical error if *.cbuild-run.yml file path is invalid
  • Show warning when packs required by*.cbuild-run.yml file are missing
• CMSIS-DAP:
  • Improve TransferError Exception messages to be more descriptive
  • Increase number of transfer retries after WAIT response
• Probe: more reliable probe detection when probe is connected after pyOCD is started
• CI: Append version information to release build artifacts

Fixes

• CMSIS-DAP probe: fix support for USB HID probes which don't have a serial number
• Semihosting: fix read when no data is available

Full Changelog: v0.38.0...v0.39.0

v0.38.0

v0.38.0 on PyPI

Improvements

• Add CoreSight AP specific CSW handling for AHB-AP, AXI-AP, APB-AP
• Add more debug logging information for cbuild-run targets
• Add support for SW breakpoints when cache is present
• Cortex-M: configure AP for cacheable access when cache is present
• Flash algorithms: relax memory layout rules and add RAM alignment and minimum stack size checking

Fixes

• CMSIS-DAP probe: fix macOS HID read/write
• cbuild-run: use cbuild-run.yml parent folder as working directory for relative paths
• Flash region builder: remove flash algorithm page size adjustment
• Docs: fix remove_breakpoint call in elf API example (@laurensmiers)

New Contributors

• @RobertRostohar made their first contribution in #1790
• @DavidLesnjak made their first contribution in #1792

Full Changelog: v0.37.0...v0.38.0

v0.37.0

v0.37.0 on PyPI

Important note

With this release, Python 3.7 is no longer supported. The minimum Python version is now 3.8.0.

Improvements

• CMSIS-Toolbox Run and Debug Management integration:
  • add a --cbuild-run option across subcommands
  • select target based on cbuild-run
  • debugger-clock setting from cbuild-run
  • default memory map
  • primary-core and GDB server port selection based on cbuild-run
• GDB server:
  • add option for stetting soft breakpoints as hard
  • add option for resetting and running the target without halting
  • stricter qC command handling (@tlyu)
• Coresight:
  • add apid handling
  • add AP CSW register SPROT bit handling
  • fix offset for APv2 in discovery step
• Loader: generate reset when loading to RAM
• RTOS: add hint for Zephyr’s thread info configuration
• RTT: allow no down-channels (@laurensmiers)
• Debug sequence: increase robustness
• Memory map: add pname based filtering
• Probe: filter out Cypress KitProg3 bridge

Fixes

• Fix progress bar reprinting the same value when no progress is made
• Typing: fix typing of chip_erase from bool to str (@NilsIrl)
• pytest: use assert_not_called instead of not_called
• target: disable reads of erased sectors if Verify function is provided in the algorithm
• flash:
  • disable builder double buffering by default
  • write XPSR register on init on Cortex-M devices

Targets

• Add MPS2 AN521 target
• Add Ambiq Apollo3 target and NM180410 board (@joshua-nmi)
• Add RP2350 target (@konkers)
• Add nRF54L15 target (@maxd-nordic)
• Add STM32H750 target (@nattgris)
• Add HC32F115/155/334/467/472 targets (@wuze)
• Update HC32F448/45x/460/4A0(2) targets (@wuze)
• Fix sector size and RDP check on STM32H743 and H723 (@nattgris)

Other

• Docs:
  • fix incorrect documentation for default GDB server port (@FredeHoey)
  • document cbuild-run support
  • enhance load subcommand guidance
• CI:
  • drop Python 3.7 and add 3.12 and 3.13
  • update upload-artifact following deprecation
  • update CodeQL workflow
  • add workflow for generating standalone binaries using PyInstaller
• Session: add missing return in UserScriptFunctionProxy
• Optional use of libusb-package with fallback to pyusb (@dvzrv)

New Contributors

• @ithinuel made their first contribution in #1638
• @joshua-nmi made their first contribution in #1632
• @FredeHoey made their first contribution in #1650
• @laurensmiers made their first contribution in #1680
• @gotlaufs made their first contribution in #1758
• @tlyu made their first contribution in #1660
• @konkers made their first contribution in #1718
• @nattgris made their first contribution in #1703
• @NilsIrl made their first contribution in #1748
• @TeoMahnic made their first contribution in #1777

Full Changelog: v0.36.0...v0.37.0

v0.36.0

v0.36.0 on PyPI

Improvements

• Allow FlashBuilder to work when program page size is larger than sector erase size (@BrianPugh)
• Very basic implementation to get a "connect" LED status display (@rgrr)
• Add Trace Funnel Coresight component (@rapgenic)
• Cortex-M CPU type detection improvements
• Debug sequences: support pname on DebugPort* sequences

Targets

• Add MAX32666FTHR board (@ozersa)
• Add STMicro STM32 H743 and H723 targets (@unsanded)
• nRF91 family improvements (@maxd-nordic)
• Add HDSC HC32F448 hc32a460xe and hc32a4a0xi. (@lennvn)
• Add airm2m air001 target (@kaidegit)
• Add airm2m air32f103 target (@HalfSweet)
• Add STMicro STM32H7B0 Target (@BrianPugh)
• Add NXP S32K344 target (@PetervdPerk-NXP)
• Add Realtek RTL8762C (@suphammer)
• Add some missing ST and NXP board IDs
• Fix HC32l130 32k+ flash error (@kaidegit)
• Fix HC32L13x size and enable double buffering (@kaidegit)
• Infineon PSoC6: remove unnecessary sleep during reset (@te-johan)
• Remove part number match for NXP MIMXRTxxxx series family

Fixes

• RTT: fix CB not found (@tdasika)
• CMSIS-DAP: Windows performance regression fix
• Debug sequences: fix assignment expressions.
• flash: fix some type errors, sort imports
• Removed extraneous space character in the default cortex_m target warning message (@BenjaminSoelberg)
• Flash loader: fix missing import of RamRegion
• coresight: adiv5 discovery: increment invalid AP count on exception
• cortex-m: reset_halt: just warn about invalid T-bit, don't automatically fix
• commands: reset: fall back to reset via probe if context has no selected core
• Only create one session to access options when there's no current session, to reduce debug log message output.

Miscellaneous

• docs: fix example (@liux-pro)
• Update copyright section for Maxim (@ozersa)
• probe: cmsis-dap: use test binary from builtin board data for v2.1 based board info
• Use annotations future in several source files
• Update built-in targets and commands documentation

❤️ Special thanks to new contributors!

• @BenjaminSoelberg
• @BrianPugh
• @HalfSweet
• @kaidegit
• @liux-pro
• @PetervdPerk-NXP
• @rapgenic
• @suphammer
• @tdasika
• @unsanded

Full Changelog: v0.35.1...v0.36.0

v0.35.1

v0.35.1 on PyPI

Fixes

• debug sequences: support [uU] suffix on integer literals
• commands: show accessible-pins: fix function call, print GPIO pins
• commands: show locked: fix misspelled "target"
• coresight: dap: revert API change to add DebugPort param to DPConnector constructor (in particular, this broke the NXP SPSDK tool's pyOCD support)
• manifest: add sequences.lark
• code quality: do not use bare exception handler (thanks @jsiverskog)

Full Changelog: v0.35.0...v0.35.1

v0.35.0

pyocd v0.35.0 on PyPI

Important note

With this release, Python 3.6 is no longer supported. The minimum Python version is now 3.7.0.

Features

• cmsis-packs: debug sequence support; see the documentation for details
• rtt: add RTT support to gdbserver via the addition of an rtt command (thanks @samueldewan)
• rtt: add logging function to rtt sub-command (thanks @zjli-2019)
• coresight: cortex-m: 'primary_core' option
• subcommands: Python tracebacks are no longer printed unless debug logging is enabled (the debug.traceback option is disabled by default)
• object graph nodes have names now, accessible with the .node_name attribute
  • board and SoC nodes have default names of "board" and "soc"
  • CPUs will have a default (uniquified) name of the CPU type, or a custom name specified in a DFP
  • these names are visible in some of the commands such as show cores or show graph, and can be used in commands such as core (to select the core that commands apply to)
• memory map: memory regions can have subregions; this is used for flash memory regions to explicitly support multiple sector sizes and/or flash algorithms
• target: added generic sw_system and sw_core reset types (aliased as system and core, with Target.ResetType.SW_SYSTEM and Target.ResetType.SW_CORE enums in the API), corresponding to the existing sysresetreq and vectreset reset types
• target: .supported_reset_types property returns a list of allowed reset type enums
• flash: add --no-reset option to prevent resetting of device after programming (thanks @nordicjm)
• flash: memory regions are now created when a DFP specifies an algorithm without also defining a corresponding memory region, as long as that algorithm is marked as default
• core: cache.enable_memory and cache.enable_register session options to control the memory and register cache used by the gdb server
• commands: add show sequences command
• commands: add reset-type value to show and set current reset type and view available reset types
• commands: new sleep command
• commands: add pins and accessible-pins values
• api: debug probe pins API

Targets

• target: add YTMicro device support (thanks @majorlin)
• target: builtin support for LPC55S16 (thanks @imi415)
• target name: fix DISCO-H745I target name to stm32h745xihx (thanks @mbrossard)
• family: add nRF91 family that works with the nrf9160_xxaa target from the NordicSemiconductor.nRF_DeviceFamilyPack DFP (not a builtin target) (thanks @maxd-nordic)
• family: update Nordic nRF52 approtect handling (thanks @maxd-nordic)
• family: no longer use the builtin NXP LPC55xx family class for DFP-based LPC55xx targets, since there is a conflict with the debug sequences contained within those DFPs

Changes

• packs: expanded folder support, tilde expanding, exception and other small improvements
• rtt: refactor RTT (thanks @samueldewan)
• commander: use logger for session open errors
• semihosting: use POSIX stdio fd numbers (thanks @rgrr)
• semihosting: transparent io (thanks @rgrr)
• semihosting: SYS_GET_CMDLINE, feature bits, tilde expansion, type fixes
• cortex-m: only clear DEMCR and invoke stop_core_debug delegate if resuming core on disconnect
• coresight: component ids: STM 0x962 with archid=0, CS-400 Replicator 0x909, CS-400 HTM, more
• coresight: cortex_m: improve debug log for inability to resume core
• memory map: memory region attributes can be changed after a region is created, making it easier to modify regions in a user script
• flash: many improvements and fixes to how flash memory regions are created for DFP based targets
• flash: place algo at end of RAM with stack going all the way to RAM start
• commands: show map: print memory map subregions
• commands: show cores: print cores in a table with the core name
• commands: show graph: print node names
• commands: core: print core names, allow selecting core by name
• dependency: migrate away from deprecated pkg_resources to importlib
• dependency: bump minimum cmsis-pack-manager version to 0.5.2
• dependencies: bump pylink-square to minimum v1.0 (thanks @avi-jois)
• setup.cfg: add Python 3.11 to classifiers

Fixes

• probe: accept WCH-Link as DAPv1 (thanks @eugene-bright)
• probe: cmsis-dap: add "CMSIS_DAP" to known device strings
• probe: stlink: cache board IDs to improve connect time
• semihosting: ensure directories exist before opening a file (thanks @Hoohaha)
• RTOS: Catch TransferErrors during kernel state checks (thanks @imi415)
• flash: catch exceptions while fetching state (thanks @maxd-nordic)
• coresight: discovery: continue after an AP probe failure occurs
• core: soc_target: options to control memory and register cache enablement
• trace: minor trace logging improvements
• commands: reinit: set exec context attrs to defaults

Other

• udev: add rule for STM32F103C8T6_CMSIS-DAP_SWOC CMSIS-DAP probe (thanks @kholia)
• workflows: basic_test: add python 3.11 to matrix
• workflow: basic_test_skipped: add matching matrix to basic_test so the job names are the same
• test: unit: test_semihosting: comment out tests using telnetlib
• docs: enhance API examples (thanks @rgrr)
• docs: added Open-CMSIS-Pack support documentation
• docs: updated targets and commands reference
• docs: remove seriously outdated how_to_build.md
• type annotation fixes and additions

New Contributors

• @avi-jois made their first contribution in #1503
• @eugene-bright made their first contribution in #1399
• @imi415 made their first contribution in #1435
• @majorlin made their first contribution in #1255
• @maxd-nordic made their first contribution in #1505
• @nordicjm made their first contribution in #1492
• @samueldewan made their first contribution in #1443
• @fkjagodzinski made their first contribution in #1476
• @rgrr made their first contribution in #1517
• @kholia made their first contribution in #1509
• @zjli-2019 made their first contribution in #1527

Full Changelog: v0.34.3...v0.35.0

v0.34.3

v0.34.3 on PyPI

Fixes

• STLink: Fix 1-byte transfers (for real this time… 😅) (thanks @fkjagodzinski!)

Targets

• Maxim MAX32660: align second double buffer to size of one sector (thanks @ttt-t3r!)

Full Changelog: v0.34.2...v0.34.3